enum | {
lldb_private::k_first_gpr_arm = 0
, lldb_private::gpr_r0_arm = k_first_gpr_arm
, lldb_private::gpr_r1_arm
, lldb_private::gpr_r2_arm
,
lldb_private::gpr_r3_arm
, lldb_private::gpr_r4_arm
, lldb_private::gpr_r5_arm
, lldb_private::gpr_r6_arm
,
lldb_private::gpr_r7_arm
, lldb_private::gpr_r8_arm
, lldb_private::gpr_r9_arm
, lldb_private::gpr_r10_arm
,
lldb_private::gpr_r11_arm
, lldb_private::gpr_r12_arm
, lldb_private::gpr_r13_arm
, lldb_private::gpr_sp_arm = gpr_r13_arm
,
lldb_private::gpr_r14_arm
, lldb_private::gpr_lr_arm = gpr_r14_arm
, lldb_private::gpr_r15_arm
, lldb_private::gpr_pc_arm = gpr_r15_arm
,
lldb_private::gpr_cpsr_arm
, lldb_private::k_last_gpr_arm = gpr_cpsr_arm
, lldb_private::k_first_fpr_arm
, lldb_private::fpu_s0_arm = k_first_fpr_arm
,
lldb_private::fpu_s1_arm
, lldb_private::fpu_s2_arm
, lldb_private::fpu_s3_arm
, lldb_private::fpu_s4_arm
,
lldb_private::fpu_s5_arm
, lldb_private::fpu_s6_arm
, lldb_private::fpu_s7_arm
, lldb_private::fpu_s8_arm
,
lldb_private::fpu_s9_arm
, lldb_private::fpu_s10_arm
, lldb_private::fpu_s11_arm
, lldb_private::fpu_s12_arm
,
lldb_private::fpu_s13_arm
, lldb_private::fpu_s14_arm
, lldb_private::fpu_s15_arm
, lldb_private::fpu_s16_arm
,
lldb_private::fpu_s17_arm
, lldb_private::fpu_s18_arm
, lldb_private::fpu_s19_arm
, lldb_private::fpu_s20_arm
,
lldb_private::fpu_s21_arm
, lldb_private::fpu_s22_arm
, lldb_private::fpu_s23_arm
, lldb_private::fpu_s24_arm
,
lldb_private::fpu_s25_arm
, lldb_private::fpu_s26_arm
, lldb_private::fpu_s27_arm
, lldb_private::fpu_s28_arm
,
lldb_private::fpu_s29_arm
, lldb_private::fpu_s30_arm
, lldb_private::fpu_s31_arm
, lldb_private::fpu_fpscr_arm
,
lldb_private::fpu_d0_arm
, lldb_private::fpu_d1_arm
, lldb_private::fpu_d2_arm
, lldb_private::fpu_d3_arm
,
lldb_private::fpu_d4_arm
, lldb_private::fpu_d5_arm
, lldb_private::fpu_d6_arm
, lldb_private::fpu_d7_arm
,
lldb_private::fpu_d8_arm
, lldb_private::fpu_d9_arm
, lldb_private::fpu_d10_arm
, lldb_private::fpu_d11_arm
,
lldb_private::fpu_d12_arm
, lldb_private::fpu_d13_arm
, lldb_private::fpu_d14_arm
, lldb_private::fpu_d15_arm
,
lldb_private::fpu_d16_arm
, lldb_private::fpu_d17_arm
, lldb_private::fpu_d18_arm
, lldb_private::fpu_d19_arm
,
lldb_private::fpu_d20_arm
, lldb_private::fpu_d21_arm
, lldb_private::fpu_d22_arm
, lldb_private::fpu_d23_arm
,
lldb_private::fpu_d24_arm
, lldb_private::fpu_d25_arm
, lldb_private::fpu_d26_arm
, lldb_private::fpu_d27_arm
,
lldb_private::fpu_d28_arm
, lldb_private::fpu_d29_arm
, lldb_private::fpu_d30_arm
, lldb_private::fpu_d31_arm
,
lldb_private::fpu_q0_arm
, lldb_private::fpu_q1_arm
, lldb_private::fpu_q2_arm
, lldb_private::fpu_q3_arm
,
lldb_private::fpu_q4_arm
, lldb_private::fpu_q5_arm
, lldb_private::fpu_q6_arm
, lldb_private::fpu_q7_arm
,
lldb_private::fpu_q8_arm
, lldb_private::fpu_q9_arm
, lldb_private::fpu_q10_arm
, lldb_private::fpu_q11_arm
,
lldb_private::fpu_q12_arm
, lldb_private::fpu_q13_arm
, lldb_private::fpu_q14_arm
, lldb_private::fpu_q15_arm
,
lldb_private::k_last_fpr_arm = fpu_q15_arm
, lldb_private::exc_exception_arm
, lldb_private::exc_fsr_arm
, lldb_private::exc_far_arm
,
lldb_private::dbg_bvr0_arm
, lldb_private::dbg_bvr1_arm
, lldb_private::dbg_bvr2_arm
, lldb_private::dbg_bvr3_arm
,
lldb_private::dbg_bvr4_arm
, lldb_private::dbg_bvr5_arm
, lldb_private::dbg_bvr6_arm
, lldb_private::dbg_bvr7_arm
,
lldb_private::dbg_bvr8_arm
, lldb_private::dbg_bvr9_arm
, lldb_private::dbg_bvr10_arm
, lldb_private::dbg_bvr11_arm
,
lldb_private::dbg_bvr12_arm
, lldb_private::dbg_bvr13_arm
, lldb_private::dbg_bvr14_arm
, lldb_private::dbg_bvr15_arm
,
lldb_private::dbg_bcr0_arm
, lldb_private::dbg_bcr1_arm
, lldb_private::dbg_bcr2_arm
, lldb_private::dbg_bcr3_arm
,
lldb_private::dbg_bcr4_arm
, lldb_private::dbg_bcr5_arm
, lldb_private::dbg_bcr6_arm
, lldb_private::dbg_bcr7_arm
,
lldb_private::dbg_bcr8_arm
, lldb_private::dbg_bcr9_arm
, lldb_private::dbg_bcr10_arm
, lldb_private::dbg_bcr11_arm
,
lldb_private::dbg_bcr12_arm
, lldb_private::dbg_bcr13_arm
, lldb_private::dbg_bcr14_arm
, lldb_private::dbg_bcr15_arm
,
lldb_private::dbg_wvr0_arm
, lldb_private::dbg_wvr1_arm
, lldb_private::dbg_wvr2_arm
, lldb_private::dbg_wvr3_arm
,
lldb_private::dbg_wvr4_arm
, lldb_private::dbg_wvr5_arm
, lldb_private::dbg_wvr6_arm
, lldb_private::dbg_wvr7_arm
,
lldb_private::dbg_wvr8_arm
, lldb_private::dbg_wvr9_arm
, lldb_private::dbg_wvr10_arm
, lldb_private::dbg_wvr11_arm
,
lldb_private::dbg_wvr12_arm
, lldb_private::dbg_wvr13_arm
, lldb_private::dbg_wvr14_arm
, lldb_private::dbg_wvr15_arm
,
lldb_private::dbg_wcr0_arm
, lldb_private::dbg_wcr1_arm
, lldb_private::dbg_wcr2_arm
, lldb_private::dbg_wcr3_arm
,
lldb_private::dbg_wcr4_arm
, lldb_private::dbg_wcr5_arm
, lldb_private::dbg_wcr6_arm
, lldb_private::dbg_wcr7_arm
,
lldb_private::dbg_wcr8_arm
, lldb_private::dbg_wcr9_arm
, lldb_private::dbg_wcr10_arm
, lldb_private::dbg_wcr11_arm
,
lldb_private::dbg_wcr12_arm
, lldb_private::dbg_wcr13_arm
, lldb_private::dbg_wcr14_arm
, lldb_private::dbg_wcr15_arm
,
lldb_private::k_num_registers_arm
, lldb_private::k_num_gpr_registers_arm = k_last_gpr_arm - k_first_gpr_arm + 1
, lldb_private::k_num_fpr_registers_arm = k_last_fpr_arm - k_first_fpr_arm + 1
} |