| enum | {
arm64_ehframe::x0 = 0
, arm64_ehframe::x1
, arm64_ehframe::x2
, arm64_ehframe::x3
,
arm64_ehframe::x4
, arm64_ehframe::x5
, arm64_ehframe::x6
, arm64_ehframe::x7
,
arm64_ehframe::x8
, arm64_ehframe::x9
, arm64_ehframe::x10
, arm64_ehframe::x11
,
arm64_ehframe::x12
, arm64_ehframe::x13
, arm64_ehframe::x14
, arm64_ehframe::x15
,
arm64_ehframe::x16
, arm64_ehframe::x17
, arm64_ehframe::x18
, arm64_ehframe::x19
,
arm64_ehframe::x20
, arm64_ehframe::x21
, arm64_ehframe::x22
, arm64_ehframe::x23
,
arm64_ehframe::x24
, arm64_ehframe::x25
, arm64_ehframe::x26
, arm64_ehframe::x27
,
arm64_ehframe::x28
, arm64_ehframe::fp
, arm64_ehframe::lr
, arm64_ehframe::sp
,
arm64_ehframe::pc
, arm64_ehframe::elr_mode = 33
, arm64_ehframe::ra_sign_state = 34
, arm64_ehframe::tpidrr0_el0 = 35
,
arm64_ehframe::tpidr_el0 = 36
, arm64_ehframe::tpidr_el1 = 37
, arm64_ehframe::tpidr_el2 = 38
, arm64_ehframe::tpidr_el3 = 39
,
arm64_ehframe::vg = 46
, arm64_ehframe::ffr = 47
, arm64_ehframe::p0 = 48
, arm64_ehframe::p1
,
arm64_ehframe::p2
, arm64_ehframe::p3
, arm64_ehframe::p4
, arm64_ehframe::p5
,
arm64_ehframe::p6
, arm64_ehframe::p7
, arm64_ehframe::p8
, arm64_ehframe::p9
,
arm64_ehframe::p10
, arm64_ehframe::p11
, arm64_ehframe::p12
, arm64_ehframe::p13
,
arm64_ehframe::p14
, arm64_ehframe::p15
, arm64_ehframe::v0 = 64
, arm64_ehframe::v1
,
arm64_ehframe::v2
, arm64_ehframe::v3
, arm64_ehframe::v4
, arm64_ehframe::v5
,
arm64_ehframe::v6
, arm64_ehframe::v7
, arm64_ehframe::v8
, arm64_ehframe::v9
,
arm64_ehframe::v10
, arm64_ehframe::v11
, arm64_ehframe::v12
, arm64_ehframe::v13
,
arm64_ehframe::v14
, arm64_ehframe::v15
, arm64_ehframe::v16
, arm64_ehframe::v17
,
arm64_ehframe::v18
, arm64_ehframe::v19
, arm64_ehframe::v20
, arm64_ehframe::v21
,
arm64_ehframe::v22
, arm64_ehframe::v23
, arm64_ehframe::v24
, arm64_ehframe::v25
,
arm64_ehframe::v26
, arm64_ehframe::v27
, arm64_ehframe::v28
, arm64_ehframe::v29
,
arm64_ehframe::v30
, arm64_ehframe::v31
, arm64_ehframe::z0 = 96
, arm64_ehframe::z1
,
arm64_ehframe::z2
, arm64_ehframe::z3
, arm64_ehframe::z4
, arm64_ehframe::z5
,
arm64_ehframe::z6
, arm64_ehframe::z7
, arm64_ehframe::z8
, arm64_ehframe::z9
,
arm64_ehframe::z10
, arm64_ehframe::z11
, arm64_ehframe::z12
, arm64_ehframe::z13
,
arm64_ehframe::z14
, arm64_ehframe::z15
, arm64_ehframe::z16
, arm64_ehframe::z17
,
arm64_ehframe::z18
, arm64_ehframe::z19
, arm64_ehframe::z20
, arm64_ehframe::z21
,
arm64_ehframe::z22
, arm64_ehframe::z23
, arm64_ehframe::z24
, arm64_ehframe::z25
,
arm64_ehframe::z26
, arm64_ehframe::z27
, arm64_ehframe::z28
, arm64_ehframe::z29
,
arm64_ehframe::z30
, arm64_ehframe::z31
} |