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RegisterContext_mips.h
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1//===-- RegisterContext_mips.h --------------------------------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8
9#ifndef LLDB_SOURCE_PLUGINS_PROCESS_UTILITY_REGISTERCONTEXT_MIPS_H
10#define LLDB_SOURCE_PLUGINS_PROCESS_UTILITY_REGISTERCONTEXT_MIPS_H
11
12#include <cstddef>
13#include <cstdint>
14
15// eh_frame and DWARF Register numbers (eRegisterKindEHFrame &
16// eRegisterKindDWARF)
17
18enum {
19 // GP Registers
130
131enum {
241};
242
243// GP registers
245 uint64_t zero;
246 uint64_t r1;
247 uint64_t r2;
248 uint64_t r3;
249 uint64_t r4;
250 uint64_t r5;
251 uint64_t r6;
252 uint64_t r7;
253 uint64_t r8;
254 uint64_t r9;
255 uint64_t r10;
256 uint64_t r11;
257 uint64_t r12;
258 uint64_t r13;
259 uint64_t r14;
260 uint64_t r15;
261 uint64_t r16;
262 uint64_t r17;
263 uint64_t r18;
264 uint64_t r19;
265 uint64_t r20;
266 uint64_t r21;
267 uint64_t r22;
268 uint64_t r23;
269 uint64_t r24;
270 uint64_t r25;
271 uint64_t r26;
272 uint64_t r27;
273 uint64_t gp;
274 uint64_t sp;
275 uint64_t r30;
276 uint64_t ra;
277 uint64_t mullo;
278 uint64_t mulhi;
279 uint64_t pc;
280 uint64_t badvaddr;
281 uint64_t sr;
282 uint64_t cause;
283 uint64_t config5;
284};
285
287 uint64_t f0;
288 uint64_t f1;
289 uint64_t f2;
290 uint64_t f3;
291 uint64_t f4;
292 uint64_t f5;
293 uint64_t f6;
294 uint64_t f7;
295 uint64_t f8;
296 uint64_t f9;
297 uint64_t f10;
298 uint64_t f11;
299 uint64_t f12;
300 uint64_t f13;
301 uint64_t f14;
302 uint64_t f15;
303 uint64_t f16;
304 uint64_t f17;
305 uint64_t f18;
306 uint64_t f19;
307 uint64_t f20;
308 uint64_t f21;
309 uint64_t f22;
310 uint64_t f23;
311 uint64_t f24;
312 uint64_t f25;
313 uint64_t f26;
314 uint64_t f27;
315 uint64_t f28;
316 uint64_t f29;
317 uint64_t f30;
318 uint64_t f31;
319 uint32_t fcsr;
320 uint32_t fir;
321 uint32_t config5;
322};
323
324struct MSAReg {
325 uint8_t byte[16];
326};
327
361 uint32_t fcsr; /* FPU control status register */
362 uint32_t fir; /* FPU implementaion revision */
363 uint32_t mcsr; /* MSA control status register */
364 uint32_t mir; /* MSA implementation revision */
365 uint32_t config5; /* Config5 register */
366};
367
368struct UserArea {
369 GPR_linux_mips gpr; // General purpose registers.
370 FPR_linux_mips fpr; // Floating point registers.
371 MSA_linux_mips msa; // MSA registers.
372};
373
374#endif // LLDB_SOURCE_PLUGINS_PROCESS_UTILITY_REGISTERCONTEXT_MIPS_H
@ dwarf_r12_mips
@ dwarf_w5_mips
@ dwarf_w16_mips
@ dwarf_f2_mips
@ dwarf_f12_mips
@ dwarf_f28_mips
@ dwarf_f11_mips
@ dwarf_mir_mips
@ dwarf_f8_mips
@ dwarf_f24_mips
@ dwarf_r13_mips
@ dwarf_f23_mips
@ dwarf_lo_mips
@ dwarf_sp_mips
@ dwarf_r26_mips
@ dwarf_config5_mips
@ dwarf_r27_mips
@ dwarf_f15_mips
@ dwarf_w8_mips
@ dwarf_r5_mips
@ dwarf_r22_mips
@ dwarf_r19_mips
@ dwarf_w0_mips
@ dwarf_w22_mips
@ dwarf_r6_mips
@ dwarf_w28_mips
@ dwarf_w19_mips
@ dwarf_sr_mips
@ dwarf_r30_mips
@ dwarf_w20_mips
@ dwarf_f5_mips
@ dwarf_r1_mips
@ dwarf_ra_mips
@ dwarf_f13_mips
@ dwarf_bad_mips
@ dwarf_r2_mips
@ dwarf_w11_mips
@ dwarf_r21_mips
@ dwarf_w3_mips
@ dwarf_f14_mips
@ dwarf_w17_mips
@ dwarf_w15_mips
@ dwarf_r17_mips
@ dwarf_r7_mips
@ dwarf_w2_mips
@ dwarf_fcsr_mips
@ dwarf_f16_mips
@ dwarf_w12_mips
@ dwarf_w7_mips
@ dwarf_f6_mips
@ dwarf_f9_mips
@ dwarf_f20_mips
@ dwarf_hi_mips
@ dwarf_f30_mips
@ dwarf_f17_mips
@ dwarf_cause_mips
@ dwarf_w14_mips
@ dwarf_w23_mips
@ dwarf_gp_mips
@ dwarf_r10_mips
@ dwarf_f31_mips
@ dwarf_w10_mips
@ dwarf_f0_mips
@ dwarf_f27_mips
@ dwarf_r15_mips
@ dwarf_r14_mips
@ dwarf_w31_mips
@ dwarf_dummy_mips
@ dwarf_r9_mips
@ dwarf_f21_mips
@ dwarf_fir_mips
@ dwarf_w27_mips
@ dwarf_ic_mips
@ dwarf_w25_mips
@ dwarf_r8_mips
@ dwarf_r16_mips
@ dwarf_f1_mips
@ dwarf_f7_mips
@ dwarf_r23_mips
@ dwarf_w29_mips
@ dwarf_pc_mips
@ dwarf_w6_mips
@ dwarf_w1_mips
@ dwarf_r25_mips
@ dwarf_w26_mips
@ dwarf_r3_mips
@ dwarf_w4_mips
@ dwarf_f25_mips
@ dwarf_f18_mips
@ dwarf_r24_mips
@ dwarf_w9_mips
@ dwarf_f29_mips
@ dwarf_r4_mips
@ dwarf_f10_mips
@ dwarf_f19_mips
@ dwarf_w18_mips
@ dwarf_w21_mips
@ dwarf_f22_mips
@ dwarf_w24_mips
@ dwarf_zero_mips
@ dwarf_f3_mips
@ dwarf_w30_mips
@ dwarf_mcsr_mips
@ dwarf_r11_mips
@ dwarf_r20_mips
@ dwarf_w13_mips
@ dwarf_f26_mips
@ dwarf_r18_mips
@ dwarf_f4_mips
@ dwarf_f12_mips64
@ dwarf_f25_mips64
@ dwarf_w28_mips64
@ dwarf_f28_mips64
@ dwarf_r1_mips64
@ dwarf_fcsr_mips64
@ dwarf_f8_mips64
@ dwarf_w24_mips64
@ dwarf_gp_mips64
@ dwarf_w23_mips64
@ dwarf_f1_mips64
@ dwarf_r7_mips64
@ dwarf_w13_mips64
@ dwarf_f6_mips64
@ dwarf_f19_mips64
@ dwarf_f20_mips64
@ dwarf_sp_mips64
@ dwarf_r13_mips64
@ dwarf_w14_mips64
@ dwarf_r30_mips64
@ dwarf_lo_mips64
@ dwarf_f17_mips64
@ dwarf_w5_mips64
@ dwarf_f2_mips64
@ dwarf_w8_mips64
@ dwarf_f5_mips64
@ dwarf_f3_mips64
@ dwarf_w22_mips64
@ dwarf_f14_mips64
@ dwarf_f26_mips64
@ dwarf_w11_mips64
@ dwarf_f7_mips64
@ dwarf_r8_mips64
@ dwarf_w9_mips64
@ dwarf_w3_mips64
@ dwarf_w27_mips64
@ dwarf_w12_mips64
@ dwarf_w0_mips64
@ dwarf_f18_mips64
@ dwarf_sr_mips64
@ dwarf_hi_mips64
@ dwarf_f31_mips64
@ dwarf_r19_mips64
@ dwarf_bad_mips64
@ dwarf_dummy_mips64
@ dwarf_f4_mips64
@ dwarf_r3_mips64
@ dwarf_r18_mips64
@ dwarf_f30_mips64
@ dwarf_f15_mips64
@ dwarf_r27_mips64
@ dwarf_mcsr_mips64
@ dwarf_w19_mips64
@ dwarf_w16_mips64
@ dwarf_r5_mips64
@ dwarf_cause_mips64
@ dwarf_r4_mips64
@ dwarf_f22_mips64
@ dwarf_w4_mips64
@ dwarf_r20_mips64
@ dwarf_r11_mips64
@ dwarf_w29_mips64
@ dwarf_r21_mips64
@ dwarf_r22_mips64
@ dwarf_w7_mips64
@ dwarf_ic_mips64
@ dwarf_f13_mips64
@ dwarf_r6_mips64
@ dwarf_pc_mips64
@ dwarf_f9_mips64
@ dwarf_f10_mips64
@ dwarf_f23_mips64
@ dwarf_r10_mips64
@ dwarf_w31_mips64
@ dwarf_w2_mips64
@ dwarf_f21_mips64
@ dwarf_w6_mips64
@ dwarf_w1_mips64
@ dwarf_f11_mips64
@ dwarf_w26_mips64
@ dwarf_w30_mips64
@ dwarf_w18_mips64
@ dwarf_w15_mips64
@ dwarf_f24_mips64
@ dwarf_f29_mips64
@ dwarf_w17_mips64
@ dwarf_w25_mips64
@ dwarf_f27_mips64
@ dwarf_f16_mips64
@ dwarf_r24_mips64
@ dwarf_r9_mips64
@ dwarf_r23_mips64
@ dwarf_mir_mips64
@ dwarf_r14_mips64
@ dwarf_config5_mips64
@ dwarf_fir_mips64
@ dwarf_r26_mips64
@ dwarf_w21_mips64
@ dwarf_f0_mips64
@ dwarf_r2_mips64
@ dwarf_r12_mips64
@ dwarf_r17_mips64
@ dwarf_r25_mips64
@ dwarf_w20_mips64
@ dwarf_w10_mips64
@ dwarf_r15_mips64
@ dwarf_r16_mips64
@ dwarf_ra_mips64
@ dwarf_zero_mips64
MSA_linux_mips msa
GPR_linux_mips gpr
FPR_linux_mips fpr