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lldb-riscv-register-enums.h
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1//===-- lldb-riscv-register-enums.h -----------------------------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8
9#ifndef LLDB_SOURCE_PLUGINS_PROCESS_UTILITY_LLDB_RISCV_REGISTER_ENUMS_H
10#define LLDB_SOURCE_PLUGINS_PROCESS_UTILITY_LLDB_RISCV_REGISTER_ENUMS_H
11
12// LLDB register codes (e.g. RegisterKind == eRegisterKindLLDB)
13
14// Internal codes for all riscv registers.
15enum {
16 // The same order as user_regs_struct in <asm/ptrace.h>
17 // note: these enum values are used as byte_offset
18 gpr_first_riscv = 0,
19 gpr_pc_riscv = gpr_first_riscv,
20 gpr_x1_riscv,
21 gpr_x2_riscv,
22 gpr_x3_riscv,
23 gpr_x4_riscv,
24 gpr_x5_riscv,
25 gpr_x6_riscv,
26 gpr_x7_riscv,
27 gpr_x8_riscv,
28 gpr_x9_riscv,
29 gpr_x10_riscv,
30 gpr_x11_riscv,
31 gpr_x12_riscv,
32 gpr_x13_riscv,
33 gpr_x14_riscv,
34 gpr_x15_riscv,
35 gpr_x16_riscv,
36 gpr_x17_riscv,
37 gpr_x18_riscv,
38 gpr_x19_riscv,
39 gpr_x20_riscv,
40 gpr_x21_riscv,
41 gpr_x22_riscv,
42 gpr_x23_riscv,
43 gpr_x24_riscv,
44 gpr_x25_riscv,
45 gpr_x26_riscv,
46 gpr_x27_riscv,
47 gpr_x28_riscv,
48 gpr_x29_riscv,
49 gpr_x30_riscv,
50 gpr_x31_riscv,
51 gpr_x0_riscv,
52 gpr_zero_riscv = gpr_x0_riscv,
53 gpr_ra_riscv = gpr_x1_riscv,
54 gpr_sp_riscv = gpr_x2_riscv,
55 gpr_gp_riscv = gpr_x3_riscv,
56 gpr_tp_riscv = gpr_x4_riscv,
57 gpr_t0_riscv = gpr_x5_riscv,
58 gpr_t1_riscv = gpr_x6_riscv,
59 gpr_t2_riscv = gpr_x7_riscv,
60 gpr_fp_riscv = gpr_x8_riscv,
61 gpr_s1_riscv = gpr_x9_riscv,
62 gpr_a0_riscv = gpr_x10_riscv,
63 gpr_a1_riscv = gpr_x11_riscv,
64 gpr_a2_riscv = gpr_x12_riscv,
65 gpr_a3_riscv = gpr_x13_riscv,
66 gpr_a4_riscv = gpr_x14_riscv,
67 gpr_a5_riscv = gpr_x15_riscv,
68 gpr_a6_riscv = gpr_x16_riscv,
69 gpr_a7_riscv = gpr_x17_riscv,
70 gpr_s2_riscv = gpr_x18_riscv,
71 gpr_s3_riscv = gpr_x19_riscv,
72 gpr_s4_riscv = gpr_x20_riscv,
73 gpr_s5_riscv = gpr_x21_riscv,
74 gpr_s6_riscv = gpr_x22_riscv,
75 gpr_s7_riscv = gpr_x23_riscv,
76 gpr_s8_riscv = gpr_x24_riscv,
77 gpr_s9_riscv = gpr_x25_riscv,
78 gpr_s10_riscv = gpr_x26_riscv,
79 gpr_s11_riscv = gpr_x27_riscv,
80 gpr_t3_riscv = gpr_x28_riscv,
81 gpr_t4_riscv = gpr_x29_riscv,
82 gpr_t5_riscv = gpr_x30_riscv,
83 gpr_t6_riscv = gpr_x31_riscv,
84 gpr_last_riscv = gpr_x0_riscv,
85
86 fpr_first_riscv = 33,
87 fpr_f0_riscv = fpr_first_riscv,
88 fpr_f1_riscv,
89 fpr_f2_riscv,
90 fpr_f3_riscv,
91 fpr_f4_riscv,
92 fpr_f5_riscv,
93 fpr_f6_riscv,
94 fpr_f7_riscv,
95 fpr_f8_riscv,
96 fpr_f9_riscv,
97 fpr_f10_riscv,
98 fpr_f11_riscv,
99 fpr_f12_riscv,
100 fpr_f13_riscv,
101 fpr_f14_riscv,
102 fpr_f15_riscv,
103 fpr_f16_riscv,
104 fpr_f17_riscv,
105 fpr_f18_riscv,
106 fpr_f19_riscv,
107 fpr_f20_riscv,
108 fpr_f21_riscv,
109 fpr_f22_riscv,
110 fpr_f23_riscv,
111 fpr_f24_riscv,
112 fpr_f25_riscv,
113 fpr_f26_riscv,
114 fpr_f27_riscv,
115 fpr_f28_riscv,
116 fpr_f29_riscv,
117 fpr_f30_riscv,
118 fpr_f31_riscv,
119
120 fpr_fcsr_riscv,
121 fpr_ft0_riscv = fpr_f0_riscv,
122 fpr_ft1_riscv = fpr_f1_riscv,
123 fpr_ft2_riscv = fpr_f2_riscv,
124 fpr_ft3_riscv = fpr_f3_riscv,
125 fpr_ft4_riscv = fpr_f4_riscv,
126 fpr_ft5_riscv = fpr_f5_riscv,
127 fpr_ft6_riscv = fpr_f6_riscv,
128 fpr_ft7_riscv = fpr_f7_riscv,
129 fpr_fs0_riscv = fpr_f8_riscv,
130 fpr_fs1_riscv = fpr_f9_riscv,
131 fpr_fa0_riscv = fpr_f10_riscv,
132 fpr_fa1_riscv = fpr_f11_riscv,
133 fpr_fa2_riscv = fpr_f12_riscv,
134 fpr_fa3_riscv = fpr_f13_riscv,
135 fpr_fa4_riscv = fpr_f14_riscv,
136 fpr_fa5_riscv = fpr_f15_riscv,
137 fpr_fa6_riscv = fpr_f16_riscv,
138 fpr_fa7_riscv = fpr_f17_riscv,
139 fpr_fs2_riscv = fpr_f18_riscv,
140 fpr_fs3_riscv = fpr_f19_riscv,
141 fpr_fs4_riscv = fpr_f20_riscv,
142 fpr_fs5_riscv = fpr_f21_riscv,
143 fpr_fs6_riscv = fpr_f22_riscv,
144 fpr_fs7_riscv = fpr_f23_riscv,
145 fpr_fs8_riscv = fpr_f24_riscv,
146 fpr_fs9_riscv = fpr_f25_riscv,
147 fpr_fs10_riscv = fpr_f26_riscv,
148 fpr_fs11_riscv = fpr_f27_riscv,
149 fpr_ft8_riscv = fpr_f28_riscv,
150 fpr_ft9_riscv = fpr_f29_riscv,
151 fpr_ft10_riscv = fpr_f30_riscv,
152 fpr_ft11_riscv = fpr_f31_riscv,
153 fpr_last_riscv = fpr_fcsr_riscv,
154
155 vpr_first_riscv = 66,
156 vpr_v0_riscv = vpr_first_riscv,
157 vpr_v1_riscv,
158 vpr_v2_riscv,
159 vpr_v3_riscv,
160 vpr_v4_riscv,
161 vpr_v5_riscv,
162 vpr_v6_riscv,
163 vpr_v7_riscv,
164 vpr_v8_riscv,
165 vpr_v9_riscv,
166 vpr_v10_riscv,
167 vpr_v11_riscv,
168 vpr_v12_riscv,
169 vpr_v13_riscv,
170 vpr_v14_riscv,
171 vpr_v15_riscv,
172 vpr_v16_riscv,
173 vpr_v17_riscv,
174 vpr_v18_riscv,
175 vpr_v19_riscv,
176 vpr_v20_riscv,
177 vpr_v21_riscv,
178 vpr_v22_riscv,
179 vpr_v23_riscv,
180 vpr_v24_riscv,
181 vpr_v25_riscv,
182 vpr_v26_riscv,
183 vpr_v27_riscv,
184 vpr_v28_riscv,
185 vpr_v29_riscv,
186 vpr_v30_riscv,
187 vpr_v31_riscv,
188 vpr_last_riscv = vpr_v31_riscv,
189
190 k_num_registers_riscv
191};
192
193#endif // LLDB_SOURCE_PLUGINS_PROCESS_UTILITY_LLDB_RISCV_REGISTER_ENUMS_H
k_num_registers_riscv
@ k_num_registers_riscv
Definition: lldb-riscv-register-enums.h:190
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