LLDB mainline
NativeRegisterContextLinux_arm64.h
Go to the documentation of this file.
1//===-- NativeRegisterContextLinux_arm64.h ---------------------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8
9#if defined(__arm64__) || defined(__aarch64__)
10
11#ifndef lldb_NativeRegisterContextLinux_arm64_h
12#define lldb_NativeRegisterContextLinux_arm64_h
13
18
19#include <asm/ptrace.h>
20
21namespace lldb_private {
22namespace process_linux {
23
24class NativeProcessLinux;
25
26class NativeRegisterContextLinux_arm64
27 : public NativeRegisterContextLinux,
28 public NativeRegisterContextDBReg_arm64 {
29public:
30 NativeRegisterContextLinux_arm64(
31 const ArchSpec &target_arch, NativeThreadProtocol &native_thread,
32 std::unique_ptr<RegisterInfoPOSIX_arm64> register_info_up);
33
34 uint32_t GetRegisterSetCount() const override;
35
36 uint32_t GetUserRegisterCount() const override;
37
38 const RegisterSet *GetRegisterSet(uint32_t set_index) const override;
39
40 Status ReadRegister(const RegisterInfo *reg_info,
41 RegisterValue &reg_value) override;
42
43 Status WriteRegister(const RegisterInfo *reg_info,
44 const RegisterValue &reg_value) override;
45
46 Status ReadAllRegisterValues(lldb::WritableDataBufferSP &data_sp) override;
47
48 Status WriteAllRegisterValues(const lldb::DataBufferSP &data_sp) override;
49
50 void InvalidateAllRegisters() override;
51
52 std::vector<uint32_t>
53 GetExpeditedRegisters(ExpeditedRegs expType) const override;
54
55 bool RegisterOffsetIsDynamic() const override { return true; }
56
57 llvm::Expected<MemoryTaggingDetails>
58 GetMemoryTaggingDetails(int32_t type) override;
59
60protected:
61 Status ReadGPR() override;
62
63 Status WriteGPR() override;
64
65 Status ReadFPR() override;
66
67 Status WriteFPR() override;
68
69 void *GetGPRBuffer() override { return &m_gpr_arm64; }
70
71 // GetGPRBufferSize returns sizeof arm64 GPR ptrace buffer, it is different
72 // from GetGPRSize which returns sizeof RegisterInfoPOSIX_arm64::GPR.
73 size_t GetGPRBufferSize() { return sizeof(m_gpr_arm64); }
74
75 void *GetFPRBuffer() override { return &m_fpr; }
76
77 size_t GetFPRSize() override { return sizeof(m_fpr); }
78
79 lldb::addr_t FixWatchpointHitAddress(lldb::addr_t hit_addr) override;
80
81private:
82 bool m_gpr_is_valid;
83 bool m_fpu_is_valid;
84 bool m_sve_buffer_is_valid;
85 bool m_mte_ctrl_is_valid;
86 bool m_zt_buffer_is_valid;
87
88 bool m_sve_header_is_valid;
89 bool m_za_buffer_is_valid;
90 bool m_za_header_is_valid;
91 bool m_pac_mask_is_valid;
92 bool m_tls_is_valid;
93 size_t m_tls_size;
94
95 struct user_pt_regs m_gpr_arm64; // 64-bit general purpose registers.
96
98 m_fpr; // floating-point registers including extended register sets.
99
100 SVEState m_sve_state = SVEState::Unknown;
101 struct sve::user_sve_header m_sve_header;
102 std::vector<uint8_t> m_sve_ptrace_payload;
103
104 sve::user_za_header m_za_header;
105 std::vector<uint8_t> m_za_ptrace_payload;
106
107 bool m_refresh_hwdebug_info;
108
109 struct user_pac_mask {
110 uint64_t data_mask;
111 uint64_t insn_mask;
112 };
113
114 struct user_pac_mask m_pac_mask;
115
116 uint64_t m_mte_ctrl_reg;
117
118 struct sme_pseudo_regs {
119 uint64_t ctrl_reg;
120 uint64_t svg_reg;
121 };
122
123 struct sme_pseudo_regs m_sme_pseudo_regs;
124
125 struct tls_regs {
126 uint64_t tpidr_reg;
127 // Only valid when SME is present.
128 uint64_t tpidr2_reg;
129 };
130
131 struct tls_regs m_tls_regs;
132
133 // SME2's ZT is a 512 bit register.
134 std::array<uint8_t, 64> m_zt_reg;
135
136 bool IsGPR(unsigned reg) const;
137
138 bool IsFPR(unsigned reg) const;
139
140 Status ReadAllSVE();
141
142 Status WriteAllSVE();
143
144 Status ReadSVEHeader();
145
146 Status WriteSVEHeader();
147
148 Status ReadPAuthMask();
149
150 Status ReadMTEControl();
151
152 Status WriteMTEControl();
153
154 Status ReadTLS();
155
156 Status WriteTLS();
157
158 Status ReadSMESVG();
159
160 Status ReadZAHeader();
161
162 Status ReadZA();
163
164 Status WriteZA();
165
166 // No WriteZAHeader because writing only the header will disable ZA.
167 // Instead use WriteZA and ensure you have the correct ZA buffer size set
168 // beforehand if you wish to disable it.
169
170 Status ReadZT();
171
172 Status WriteZT();
173
174 // SVCR is a pseudo register and we do not allow writes to it.
175 Status ReadSMEControl();
176
177 bool IsSVE(unsigned reg) const;
178 bool IsSME(unsigned reg) const;
179 bool IsPAuth(unsigned reg) const;
180 bool IsMTE(unsigned reg) const;
181 bool IsTLS(unsigned reg) const;
182
183 uint64_t GetSVERegVG() { return m_sve_header.vl / 8; }
184
185 void SetSVERegVG(uint64_t vg) { m_sve_header.vl = vg * 8; }
186
187 void *GetSVEHeader() { return &m_sve_header; }
188
189 void *GetZAHeader() { return &m_za_header; }
190
191 size_t GetZAHeaderSize() { return sizeof(m_za_header); }
192
193 void *GetPACMask() { return &m_pac_mask; }
194
195 void *GetMTEControl() { return &m_mte_ctrl_reg; }
196
197 void *GetTLSBuffer() { return &m_tls_regs; }
198
199 void *GetSMEPseudoBuffer() { return &m_sme_pseudo_regs; }
200
201 void *GetZTBuffer() { return m_zt_reg.data(); }
202
203 void *GetSVEBuffer() { return m_sve_ptrace_payload.data(); }
204
205 size_t GetSVEHeaderSize() { return sizeof(m_sve_header); }
206
207 size_t GetPACMaskSize() { return sizeof(m_pac_mask); }
208
209 size_t GetSVEBufferSize() { return m_sve_ptrace_payload.size(); }
210
211 unsigned GetSVERegSet();
212
213 void *GetZABuffer() { return m_za_ptrace_payload.data(); };
214
215 size_t GetZABufferSize() { return m_za_ptrace_payload.size(); }
216
217 size_t GetMTEControlSize() { return sizeof(m_mte_ctrl_reg); }
218
219 size_t GetTLSBufferSize() { return m_tls_size; }
220
221 size_t GetSMEPseudoBufferSize() { return sizeof(m_sme_pseudo_regs); }
222
223 size_t GetZTBufferSize() { return m_zt_reg.size(); }
224
225 llvm::Error ReadHardwareDebugInfo() override;
226
227 llvm::Error WriteHardwareDebugRegs(DREGType hwbType) override;
228
229 uint32_t CalculateFprOffset(const RegisterInfo *reg_info) const;
230
231 RegisterInfoPOSIX_arm64 &GetRegisterInfo() const;
232
233 void ConfigureRegisterContext();
234
235 uint32_t CalculateSVEOffset(const RegisterInfo *reg_info) const;
236
237 Status CacheAllRegisters(uint32_t &cached_size);
238};
239
240} // namespace process_linux
241} // namespace lldb_private
242
243#endif // #ifndef lldb_NativeRegisterContextLinux_arm64_h
244
245#endif // defined (__arm64__) || defined (__aarch64__)
A class that represents a running process on the host machine.
Definition: SBAttachInfo.h:14
std::shared_ptr< lldb_private::DataBuffer > DataBufferSP
Definition: lldb-forward.h:328
std::shared_ptr< lldb_private::WritableDataBuffer > WritableDataBufferSP
Definition: lldb-forward.h:329
uint64_t addr_t
Definition: lldb-types.h:79