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RegisterInfos_x86_64.h
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1 //===-- RegisterInfos_x86_64.h ----------------------------------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 
9 // This file is meant to be textually included. Do not #include modular
10 // headers here.
11 
12 // Computes the offset of the given GPR in the user data area.
13 #define GPR_OFFSET(regname) (LLVM_EXTENSION offsetof(GPR, regname))
14 
15 // Computes the offset of the given FPR in the extended data area.
16 #define FPR_OFFSET(regname) \
17  (LLVM_EXTENSION offsetof(UserArea, fpr) + \
18  LLVM_EXTENSION offsetof(FPR, fxsave) + \
19  LLVM_EXTENSION offsetof(FXSAVE, regname))
20 
21 // Computes the offset of the YMM register assembled from register halves.
22 // Based on DNBArchImplX86_64.cpp from debugserver
23 #define YMM_OFFSET(reg_index) \
24  (LLVM_EXTENSION offsetof(UserArea, fpr) + \
25  LLVM_EXTENSION offsetof(FPR, xsave) + \
26  LLVM_EXTENSION offsetof(XSAVE, ymmh[0]) + (32 * reg_index))
27 
28 #define BNDR_OFFSET(reg_index) \
29  (LLVM_EXTENSION offsetof(UserArea, fpr) + \
30  LLVM_EXTENSION offsetof(FPR, xsave) + \
31  LLVM_EXTENSION offsetof(XSAVE, mpxr[reg_index]))
32 
33 #define BNDC_OFFSET(reg_index) \
34  (LLVM_EXTENSION offsetof(UserArea, fpr) + \
35  LLVM_EXTENSION offsetof(FPR, xsave) + \
36  LLVM_EXTENSION offsetof(XSAVE, mpxc[reg_index]))
37 
38 #ifdef DECLARE_REGISTER_INFOS_X86_64_STRUCT
39 
40 // Number of bytes needed to represent a FPR.
41 #define FPR_SIZE(reg) sizeof(((FXSAVE *)nullptr)->reg)
42 
43 // Number of bytes needed to represent the i'th FP register.
44 #define FP_SIZE sizeof(((MMSReg *)nullptr)->bytes)
45 
46 // Number of bytes needed to represent an XMM register.
47 #define XMM_SIZE sizeof(XMMReg)
48 
49 // Number of bytes needed to represent a YMM register.
50 #define YMM_SIZE sizeof(YMMReg)
51 
52 // Number of bytes needed to represent MPX registers.
53 #define BNDR_SIZE sizeof(MPXReg)
54 #define BNDC_SIZE sizeof(MPXCsr)
55 
56 #define DR_SIZE sizeof(((DBG *)nullptr)->dr[0])
57 
58 // RegisterKind: EHFrame, DWARF, Generic, Process Plugin, LLDB
59 
60 // Note that the size and offset will be updated by platform-specific classes.
61 #define DEFINE_GPR(reg, alt, kind1, kind2, kind3, kind4) \
62  { \
63  #reg, alt, sizeof(((GPR *)nullptr)->reg), \
64  GPR_OFFSET(reg), eEncodingUint, eFormatHex, \
65  {kind1, kind2, kind3, kind4, \
66  lldb_##reg##_x86_64 }, \
67  nullptr, nullptr, nullptr, 0 \
68  }
69 
70 #define DEFINE_FPR(name, reg, kind1, kind2, kind3, kind4) \
71  { \
72  #name, nullptr, FPR_SIZE(reg), FPR_OFFSET(reg), eEncodingUint, eFormatHex, \
73  {kind1, kind2, kind3, kind4, \
74  lldb_##name##_x86_64 }, \
75  nullptr, nullptr, nullptr, 0 \
76  }
77 
78 #define DEFINE_FP_ST(reg, i) \
79  { \
80  #reg #i, nullptr, FP_SIZE, \
81  LLVM_EXTENSION FPR_OFFSET( \
82  stmm[i]), eEncodingVector, eFormatVectorOfUInt8, \
83  {dwarf_st##i##_x86_64, dwarf_st##i##_x86_64, LLDB_INVALID_REGNUM, \
84  LLDB_INVALID_REGNUM, lldb_st##i##_x86_64 }, \
85  nullptr, nullptr, nullptr, 0 \
86  }
87 
88 #define DEFINE_FP_MM(reg, i) \
89  { \
90  #reg #i, nullptr, sizeof(uint64_t), \
91  LLVM_EXTENSION FPR_OFFSET( \
92  stmm[i]), eEncodingUint, eFormatHex, \
93  {dwarf_mm##i##_x86_64, dwarf_mm##i##_x86_64, \
94  LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
95  lldb_mm##i##_x86_64 }, \
96  nullptr, nullptr, nullptr, 0 \
97  }
98 
99 #define DEFINE_XMM(reg, i) \
100  { \
101  #reg #i, nullptr, XMM_SIZE, \
102  LLVM_EXTENSION FPR_OFFSET( \
103  reg[i]), eEncodingVector, eFormatVectorOfUInt8, \
104  {dwarf_##reg##i##_x86_64, dwarf_##reg##i##_x86_64, \
105  LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
106  lldb_##reg##i##_x86_64 }, \
107  nullptr, nullptr, nullptr, 0 \
108  }
109 
110 #define DEFINE_YMM(reg, i) \
111  { \
112  #reg #i, nullptr, YMM_SIZE, \
113  LLVM_EXTENSION YMM_OFFSET(i), eEncodingVector, eFormatVectorOfUInt8, \
114  {dwarf_##reg##i##h_x86_64, \
115  dwarf_##reg##i##h_x86_64, \
116  LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
117  lldb_##reg##i##_x86_64 }, \
118  nullptr, nullptr, nullptr, 0 \
119  }
120 
121 #define DEFINE_BNDR(reg, i) \
122  { \
123  #reg #i, nullptr, BNDR_SIZE, \
124  LLVM_EXTENSION BNDR_OFFSET(i), eEncodingVector, eFormatVectorOfUInt64, \
125  {dwarf_##reg##i##_x86_64, \
126  dwarf_##reg##i##_x86_64, \
127  LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
128  lldb_##reg##i##_x86_64 }, \
129  nullptr, nullptr, nullptr, 0 \
130  }
131 
132 #define DEFINE_BNDC(name, i) \
133  { \
134  #name, nullptr, BNDC_SIZE, \
135  LLVM_EXTENSION BNDC_OFFSET(i), eEncodingVector, eFormatVectorOfUInt8, \
136  {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
137  LLDB_INVALID_REGNUM, lldb_##name##_x86_64 }, \
138  nullptr, nullptr, nullptr, 0 \
139  }
140 
141 #define DEFINE_DR(reg, i) \
142  { \
143  #reg #i, nullptr, DR_SIZE, \
144  DR_OFFSET(i), eEncodingUint, eFormatHex, \
145  {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
146  LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
147  lldb_##reg##i##_x86_64 }, \
148  nullptr, nullptr, nullptr, 0 \
149  }
150 
151 #define DEFINE_GPR_PSEUDO_32(reg32, reg64) \
152  { \
153  #reg32, nullptr, 4, \
154  GPR_OFFSET(reg64), eEncodingUint, eFormatHex, \
155  {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
156  LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
157  lldb_##reg32##_x86_64 }, \
158  RegisterContextPOSIX_x86::g_contained_##reg64, \
159  RegisterContextPOSIX_x86::g_invalidate_##reg64, nullptr, 0 \
160  }
161 
162 #define DEFINE_GPR_PSEUDO_16(reg16, reg64) \
163  { \
164  #reg16, nullptr, 2, \
165  GPR_OFFSET(reg64), eEncodingUint, eFormatHex, \
166  {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
167  LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
168  lldb_##reg16##_x86_64 }, \
169  RegisterContextPOSIX_x86::g_contained_##reg64, \
170  RegisterContextPOSIX_x86::g_invalidate_##reg64, nullptr, 0 \
171  }
172 
173 #define DEFINE_GPR_PSEUDO_8H(reg8, reg64) \
174  { \
175  #reg8, nullptr, 1, \
176  GPR_OFFSET(reg64) + 1, eEncodingUint, eFormatHex, \
177  {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
178  LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
179  lldb_##reg8##_x86_64 }, \
180  RegisterContextPOSIX_x86::g_contained_##reg64, \
181  RegisterContextPOSIX_x86::g_invalidate_##reg64, nullptr, 0 \
182  }
183 
184 #define DEFINE_GPR_PSEUDO_8L(reg8, reg64) \
185  { \
186  #reg8, nullptr, 1, \
187  GPR_OFFSET(reg64), eEncodingUint, eFormatHex, \
188  {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
189  LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
190  lldb_##reg8##_x86_64 }, \
191  RegisterContextPOSIX_x86::g_contained_##reg64, \
192  RegisterContextPOSIX_x86::g_invalidate_##reg64, nullptr, 0 \
193  }
194 
195 // clang-format off
196 static RegisterInfo g_register_infos_x86_64[] = {
197 // General purpose registers EH_Frame DWARF Generic Process Plugin
198 // =========================== ================== ================ ========================= ====================
223 
224  DEFINE_GPR_PSEUDO_32(eax, rax), DEFINE_GPR_PSEUDO_32(ebx, rbx),
225  DEFINE_GPR_PSEUDO_32(ecx, rcx), DEFINE_GPR_PSEUDO_32(edx, rdx),
226  DEFINE_GPR_PSEUDO_32(edi, rdi), DEFINE_GPR_PSEUDO_32(esi, rsi),
227  DEFINE_GPR_PSEUDO_32(ebp, rbp), DEFINE_GPR_PSEUDO_32(esp, rsp),
228  DEFINE_GPR_PSEUDO_32(r8d, r8), DEFINE_GPR_PSEUDO_32(r9d, r9),
229  DEFINE_GPR_PSEUDO_32(r10d, r10), DEFINE_GPR_PSEUDO_32(r11d, r11),
230  DEFINE_GPR_PSEUDO_32(r12d, r12), DEFINE_GPR_PSEUDO_32(r13d, r13),
231  DEFINE_GPR_PSEUDO_32(r14d, r14), DEFINE_GPR_PSEUDO_32(r15d, r15),
232  DEFINE_GPR_PSEUDO_16(ax, rax), DEFINE_GPR_PSEUDO_16(bx, rbx),
233  DEFINE_GPR_PSEUDO_16(cx, rcx), DEFINE_GPR_PSEUDO_16(dx, rdx),
234  DEFINE_GPR_PSEUDO_16(di, rdi), DEFINE_GPR_PSEUDO_16(si, rsi),
235  DEFINE_GPR_PSEUDO_16(bp, rbp), DEFINE_GPR_PSEUDO_16(sp, rsp),
236  DEFINE_GPR_PSEUDO_16(r8w, r8), DEFINE_GPR_PSEUDO_16(r9w, r9),
237  DEFINE_GPR_PSEUDO_16(r10w, r10), DEFINE_GPR_PSEUDO_16(r11w, r11),
238  DEFINE_GPR_PSEUDO_16(r12w, r12), DEFINE_GPR_PSEUDO_16(r13w, r13),
239  DEFINE_GPR_PSEUDO_16(r14w, r14), DEFINE_GPR_PSEUDO_16(r15w, r15),
240  DEFINE_GPR_PSEUDO_8H(ah, rax), DEFINE_GPR_PSEUDO_8H(bh, rbx),
241  DEFINE_GPR_PSEUDO_8H(ch, rcx), DEFINE_GPR_PSEUDO_8H(dh, rdx),
242  DEFINE_GPR_PSEUDO_8L(al, rax), DEFINE_GPR_PSEUDO_8L(bl, rbx),
243  DEFINE_GPR_PSEUDO_8L(cl, rcx), DEFINE_GPR_PSEUDO_8L(dl, rdx),
244  DEFINE_GPR_PSEUDO_8L(dil, rdi), DEFINE_GPR_PSEUDO_8L(sil, rsi),
245  DEFINE_GPR_PSEUDO_8L(bpl, rbp), DEFINE_GPR_PSEUDO_8L(spl, rsp),
246  DEFINE_GPR_PSEUDO_8L(r8l, r8), DEFINE_GPR_PSEUDO_8L(r9l, r9),
247  DEFINE_GPR_PSEUDO_8L(r10l, r10), DEFINE_GPR_PSEUDO_8L(r11l, r11),
248  DEFINE_GPR_PSEUDO_8L(r12l, r12), DEFINE_GPR_PSEUDO_8L(r13l, r13),
249  DEFINE_GPR_PSEUDO_8L(r14l, r14), DEFINE_GPR_PSEUDO_8L(r15l, r15),
250 
251 // i387 Floating point registers. EH_frame DWARF Generic Process Plugin
252 // ====================================== =============== ================== =================== ====================
263 
264  // FP registers.
265  DEFINE_FP_ST(st, 0), DEFINE_FP_ST(st, 1), DEFINE_FP_ST(st, 2),
266  DEFINE_FP_ST(st, 3), DEFINE_FP_ST(st, 4), DEFINE_FP_ST(st, 5),
267  DEFINE_FP_ST(st, 6), DEFINE_FP_ST(st, 7), DEFINE_FP_MM(mm, 0),
268  DEFINE_FP_MM(mm, 1), DEFINE_FP_MM(mm, 2), DEFINE_FP_MM(mm, 3),
269  DEFINE_FP_MM(mm, 4), DEFINE_FP_MM(mm, 5), DEFINE_FP_MM(mm, 6),
270  DEFINE_FP_MM(mm, 7),
271 
272  // XMM registers
273  DEFINE_XMM(xmm, 0), DEFINE_XMM(xmm, 1), DEFINE_XMM(xmm, 2),
274  DEFINE_XMM(xmm, 3), DEFINE_XMM(xmm, 4), DEFINE_XMM(xmm, 5),
275  DEFINE_XMM(xmm, 6), DEFINE_XMM(xmm, 7), DEFINE_XMM(xmm, 8),
276  DEFINE_XMM(xmm, 9), DEFINE_XMM(xmm, 10), DEFINE_XMM(xmm, 11),
277  DEFINE_XMM(xmm, 12), DEFINE_XMM(xmm, 13), DEFINE_XMM(xmm, 14),
278  DEFINE_XMM(xmm, 15),
279 
280  // Copy of YMM registers assembled from xmm and ymmh
281  DEFINE_YMM(ymm, 0), DEFINE_YMM(ymm, 1), DEFINE_YMM(ymm, 2),
282  DEFINE_YMM(ymm, 3), DEFINE_YMM(ymm, 4), DEFINE_YMM(ymm, 5),
283  DEFINE_YMM(ymm, 6), DEFINE_YMM(ymm, 7), DEFINE_YMM(ymm, 8),
284  DEFINE_YMM(ymm, 9), DEFINE_YMM(ymm, 10), DEFINE_YMM(ymm, 11),
285  DEFINE_YMM(ymm, 12), DEFINE_YMM(ymm, 13), DEFINE_YMM(ymm, 14),
286  DEFINE_YMM(ymm, 15),
287 
288  // MPX registers
289  DEFINE_BNDR(bnd, 0),
290  DEFINE_BNDR(bnd, 1),
291  DEFINE_BNDR(bnd, 2),
292  DEFINE_BNDR(bnd, 3),
293 
294  DEFINE_BNDC(bndcfgu, 0),
295  DEFINE_BNDC(bndstatus, 1),
296 
297  // Debug registers for lldb internal use
298  DEFINE_DR(dr, 0), DEFINE_DR(dr, 1), DEFINE_DR(dr, 2), DEFINE_DR(dr, 3),
299  DEFINE_DR(dr, 4), DEFINE_DR(dr, 5), DEFINE_DR(dr, 6), DEFINE_DR(dr, 7)};
300 
301 // clang-format on
302 
303 static_assert((sizeof(g_register_infos_x86_64) /
304  sizeof(g_register_infos_x86_64[0])) == k_num_registers_x86_64,
305  "g_register_infos_x86_64 has wrong number of register infos");
306 
307 #undef FPR_SIZE
308 #undef FP_SIZE
309 #undef XMM_SIZE
310 #undef YMM_SIZE
311 #undef DEFINE_GPR
312 #undef DEFINE_FPR
313 #undef DEFINE_FP
314 #undef DEFINE_XMM
315 #undef DEFINE_YMM
316 #undef DEFINE_BNDR
317 #undef DEFINE_BNDC
318 #undef DEFINE_DR
319 #undef DEFINE_GPR_PSEUDO_32
320 #undef DEFINE_GPR_PSEUDO_16
321 #undef DEFINE_GPR_PSEUDO_8H
322 #undef DEFINE_GPR_PSEUDO_8L
323 
324 #endif // DECLARE_REGISTER_INFOS_X86_64_STRUCT
325 
326 #ifdef UPDATE_REGISTER_INFOS_I386_STRUCT_WITH_X86_64_OFFSETS
327 
328 #define UPDATE_GPR_INFO(reg, reg64) \
329  do { \
330  g_register_infos[lldb_##reg##_i386].byte_offset = GPR_OFFSET(reg64); \
331  } while (false);
332 
333 #define UPDATE_GPR_INFO_8H(reg, reg64) \
334  do { \
335  g_register_infos[lldb_##reg##_i386].byte_offset = GPR_OFFSET(reg64) + 1; \
336  } while (false);
337 
338 #define UPDATE_FPR_INFO(reg, reg64) \
339  do { \
340  g_register_infos[lldb_##reg##_i386].byte_offset = FPR_OFFSET(reg64); \
341  } while (false);
342 
343 #define UPDATE_FP_INFO(reg, i) \
344  do { \
345  g_register_infos[lldb_##reg##i##_i386].byte_offset = FPR_OFFSET(stmm[i]); \
346  } while (false);
347 
348 #define UPDATE_XMM_INFO(reg, i) \
349  do { \
350  g_register_infos[lldb_##reg##i##_i386].byte_offset = FPR_OFFSET(reg[i]); \
351  } while (false);
352 
353 #define UPDATE_YMM_INFO(reg, i) \
354  do { \
355  g_register_infos[lldb_##reg##i##_i386].byte_offset = YMM_OFFSET(i); \
356  } while (false);
357 
358 #define UPDATE_DR_INFO(reg_index) \
359  do { \
360  g_register_infos[lldb_dr##reg_index##_i386].byte_offset = \
361  DR_OFFSET(reg_index); \
362  } while (false);
363 
364 // Update the register offsets
374 UPDATE_GPR_INFO(eflags, rflags);
375 UPDATE_GPR_INFO(cs, cs);
376 UPDATE_GPR_INFO(fs, fs);
377 UPDATE_GPR_INFO(gs, gs);
378 UPDATE_GPR_INFO(ss, ss);
379 UPDATE_GPR_INFO(ds, ds);
380 UPDATE_GPR_INFO(es, es);
381 
382 UPDATE_GPR_INFO(ax, rax);
383 UPDATE_GPR_INFO(bx, rbx);
384 UPDATE_GPR_INFO(cx, rcx);
385 UPDATE_GPR_INFO(dx, rdx);
386 UPDATE_GPR_INFO(di, rdi);
387 UPDATE_GPR_INFO(si, rsi);
388 UPDATE_GPR_INFO(bp, rbp);
394 UPDATE_GPR_INFO(al, rax);
395 UPDATE_GPR_INFO(bl, rbx);
396 UPDATE_GPR_INFO(cl, rcx);
397 UPDATE_GPR_INFO(dl, rdx);
398 
399 UPDATE_FPR_INFO(fctrl, fctrl);
400 UPDATE_FPR_INFO(fstat, fstat);
401 UPDATE_FPR_INFO(ftag, ftag);
402 UPDATE_FPR_INFO(fop, fop);
403 UPDATE_FPR_INFO(fiseg, ptr.i386_.fiseg);
404 UPDATE_FPR_INFO(fioff, ptr.i386_.fioff);
405 UPDATE_FPR_INFO(fooff, ptr.i386_.fooff);
406 UPDATE_FPR_INFO(foseg, ptr.i386_.foseg);
407 UPDATE_FPR_INFO(mxcsr, mxcsr);
408 UPDATE_FPR_INFO(mxcsrmask, mxcsrmask);
409 
410 UPDATE_FP_INFO(st, 0);
411 UPDATE_FP_INFO(st, 1);
412 UPDATE_FP_INFO(st, 2);
413 UPDATE_FP_INFO(st, 3);
414 UPDATE_FP_INFO(st, 4);
415 UPDATE_FP_INFO(st, 5);
416 UPDATE_FP_INFO(st, 6);
417 UPDATE_FP_INFO(st, 7);
418 UPDATE_FP_INFO(mm, 0);
419 UPDATE_FP_INFO(mm, 1);
420 UPDATE_FP_INFO(mm, 2);
421 UPDATE_FP_INFO(mm, 3);
422 UPDATE_FP_INFO(mm, 4);
423 UPDATE_FP_INFO(mm, 5);
424 UPDATE_FP_INFO(mm, 6);
425 UPDATE_FP_INFO(mm, 7);
426 
427 UPDATE_XMM_INFO(xmm, 0);
428 UPDATE_XMM_INFO(xmm, 1);
429 UPDATE_XMM_INFO(xmm, 2);
430 UPDATE_XMM_INFO(xmm, 3);
431 UPDATE_XMM_INFO(xmm, 4);
432 UPDATE_XMM_INFO(xmm, 5);
433 UPDATE_XMM_INFO(xmm, 6);
434 UPDATE_XMM_INFO(xmm, 7);
435 
436 UPDATE_YMM_INFO(ymm, 0);
437 UPDATE_YMM_INFO(ymm, 1);
438 UPDATE_YMM_INFO(ymm, 2);
439 UPDATE_YMM_INFO(ymm, 3);
440 UPDATE_YMM_INFO(ymm, 4);
441 UPDATE_YMM_INFO(ymm, 5);
442 UPDATE_YMM_INFO(ymm, 6);
443 UPDATE_YMM_INFO(ymm, 7);
444 
445 UPDATE_DR_INFO(0);
446 UPDATE_DR_INFO(1);
447 UPDATE_DR_INFO(2);
448 UPDATE_DR_INFO(3);
449 UPDATE_DR_INFO(4);
450 UPDATE_DR_INFO(5);
451 UPDATE_DR_INFO(6);
452 UPDATE_DR_INFO(7);
453 
454 #undef UPDATE_GPR_INFO
455 #undef UPDATE_GPR_INFO_8H
456 #undef UPDATE_FPR_INFO
457 #undef UPDATE_FP_INFO
458 #undef UPDATE_XMM_INFO
459 #undef UPDATE_YMM_INFO
460 #undef UPDATE_DR_INFO
461 
462 #endif // UPDATE_REGISTER_INFOS_I386_STRUCT_WITH_X86_64_OFFSETS
463 
464 #undef GPR_OFFSET
465 #undef FPR_OFFSET
466 #undef YMM_OFFSET
#define LLDB_REGNUM_GENERIC_PC
Definition: lldb-defines.h:63
#define LLDB_REGNUM_GENERIC_ARG6
Definition: lldb-defines.h:78
#define LLDB_REGNUM_GENERIC_ARG4
Definition: lldb-defines.h:74
#define LLDB_REGNUM_GENERIC_ARG2
Definition: lldb-defines.h:70
#define UPDATE_FP_INFO(reg, i)
#define LLDB_REGNUM_GENERIC_SP
Definition: lldb-defines.h:64
#define LLDB_REGNUM_GENERIC_ARG5
Definition: lldb-defines.h:76
#define LLDB_REGNUM_GENERIC_ARG1
Definition: lldb-defines.h:68
#define LLDB_REGNUM_GENERIC_FP
Definition: lldb-defines.h:65
#define UPDATE_GPR_INFO(reg, reg64)
#define UPDATE_GPR_INFO_8H(reg, reg64)
#define LLDB_REGNUM_GENERIC_FLAGS
Definition: lldb-defines.h:67
#define DEFINE_GPR(reg, alt, kind1, kind2, kind3, kind4)
#define UPDATE_YMM_INFO(reg, i)
#define LLDB_REGNUM_GENERIC_ARG3
Definition: lldb-defines.h:72
#define UPDATE_DR_INFO(reg_index)
#define UPDATE_XMM_INFO(reg, i)
#define UPDATE_FPR_INFO(reg, reg64)
#define LLDB_INVALID_REGNUM
Definition: lldb-defines.h:90