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LLDB mainline
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#include <ArchitectureRISCV.h>
Public Member Functions | |
| llvm::StringRef | GetPluginName () override |
| void | OverrideStopInfo (Thread &thread) const override |
| This is currently intended to handle cases where a program stops at an instruction that won't get executed and it allows the stop reason, like "breakpoint hit", to be replaced with a different stop reason like "no stop reason". | |
| bool | IsValidTrapInstruction (llvm::ArrayRef< uint8_t > reference, llvm::ArrayRef< uint8_t > observed) const override |
| Returns whether a given byte sequence is a valid trap instruction for the architecture. | |
| Public Member Functions inherited from lldb_private::Architecture | |
| virtual size_t | GetBytesToSkip (Symbol &func, const Address &curr_addr) const |
| This method is used to get the number of bytes that should be skipped, from function start address, to reach the first instruction after the prologue. | |
| virtual void | AdjustBreakpointAddress (const Symbol &func, Address &addr) const |
| Adjust function breakpoint address, if needed. | |
| virtual lldb::addr_t | GetCallableLoadAddress (lldb::addr_t addr, AddressClass addr_class=AddressClass::eInvalid) const |
| Get load_addr as a callable code load address for this target. | |
| virtual lldb::addr_t | GetOpcodeLoadAddress (lldb::addr_t addr, AddressClass addr_class=AddressClass::eInvalid) const |
| Get load_addr as an opcode for this target. | |
| virtual lldb::addr_t | GetBreakableLoadAddress (lldb::addr_t addr, Target &target) const |
| virtual const MemoryTagManager * | GetMemoryTagManager () const |
| virtual bool | RegisterWriteCausesReconfigure (const llvm::StringRef name) const |
| virtual bool | ReconfigureRegisterInfo (DynamicRegisterInfo ®_info, DataExtractor ®_data, RegisterContext ®_context) const |
| virtual lldb::UnwindPlanSP | GetArchitectureUnwindPlan (lldb_private::Thread &thread, lldb_private::RegisterContextUnwind *regctx, std::shared_ptr< const UnwindPlan > current_unwindplan) |
| Return an UnwindPlan that allows architecture-defined rules for finding saved registers, given a particular set of register values. | |
| Public Member Functions inherited from lldb_private::PluginInterface | |
| PluginInterface ()=default | |
| virtual | ~PluginInterface ()=default |
| PluginInterface (const PluginInterface &)=delete | |
| PluginInterface & | operator= (const PluginInterface &)=delete |
Static Public Member Functions | |
| static llvm::StringRef | GetPluginNameStatic () |
| static void | Initialize () |
| static void | Terminate () |
Private Member Functions | |
| ArchitectureRISCV ()=default | |
Static Private Member Functions | |
| static std::unique_ptr< Architecture > | Create (const ArchSpec &arch) |
Definition at line 16 of file ArchitectureRISCV.h.
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privatedefault |
Referenced by Create(), and Initialize().
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staticprivate |
Definition at line 27 of file ArchitectureRISCV.cpp.
References ArchitectureRISCV(), and lldb_private::ArchSpec::GetMachine().
Referenced by Initialize(), and Terminate().
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inlineoverridevirtual |
Implements lldb_private::PluginInterface.
Definition at line 22 of file ArchitectureRISCV.h.
References GetPluginNameStatic().
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inlinestatic |
Definition at line 18 of file ArchitectureRISCV.h.
Referenced by GetPluginName(), and Initialize().
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static |
Definition at line 17 of file ArchitectureRISCV.cpp.
References ArchitectureRISCV(), Create(), GetPluginNameStatic(), Initialize(), and lldb_private::PluginManager::RegisterPlugin().
Referenced by Initialize().
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overridevirtual |
Returns whether a given byte sequence is a valid trap instruction for the architecture.
Some architectures feature instructions that have immediates that can take on any value, resulting in a family of valid byte sequences. If the observed byte sequence is shorter than the reference then they are considered not to match, even if the initial bytes would match.
Reimplemented from lldb_private::Architecture.
Definition at line 34 of file ArchitectureRISCV.cpp.
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inlineoverridevirtual |
This is currently intended to handle cases where a program stops at an instruction that won't get executed and it allows the stop reason, like "breakpoint hit", to be replaced with a different stop reason like "no stop reason".
This is specifically used for ARM in Thumb code when we stop in an IT instruction (if/then/else) where the instruction won't get executed and therefore it wouldn't be correct to show the program stopped at the current PC. The code is generic and applies to all ARM CPUs.
Implements lldb_private::Architecture.
Definition at line 24 of file ArchitectureRISCV.h.
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static |
Definition at line 23 of file ArchitectureRISCV.cpp.
References Create(), and lldb_private::PluginManager::UnregisterPlugin().