14#include "llvm/ADT/ArrayRef.h"
15#include "llvm/ADT/SmallVector.h"
16#include "llvm/ADT/StringRef.h"
17#include "llvm/TargetParser/SubtargetFeature.h"
19#define GPR_OFFSET(idx) ((idx) * sizeof(uint32_t))
20#define FPR_OFFSET(idx) ((idx) * sizeof(uint32_t))
22#define DECLARE_REGISTER_INFOS_RISCV32_STRUCT
24#undef DECLARE_REGISTER_INFOS_RISCV32_STRUCT
32 const uint32_t *end = regs;
36 return std::vector<uint32_t>(regs, end);
39std::unique_ptr<RegisterContextCorePOSIX_riscv32>
42 llvm::ArrayRef<CoreNote> notes) {
43 return std::unique_ptr<RegisterContextCorePOSIX_riscv32>(
45 thread, std::make_unique<RegisterInfoPOSIXDynamic_riscv32>(arch),
51 std::unique_ptr<RegisterInfoPOSIXDynamic_riscv32> register_info,
52 const DataExtractor &gpregset, llvm::ArrayRef<CoreNote> notes)
56 std::size(g_register_infos_riscv32_gpr);
59 std::size(g_register_infos_riscv32_fpr);
61 llvm::SmallVector<std::string> features;
63 llvm::SmallVector<lldb_private::RegisterInfo> reg_infos_riscv32_csr;
67 const llvm::Triple triple = target_arch.
GetTriple();
70 std::vector<DynamicRegisterInfo::Register> registers;
71 uint32_t byte_offset = 0;
77 if (
m_gpregset.GetByteSize() >= g_register_infos_riscv32_gpr[0].byte_size) {
81 "GPR has the wrong number of registers!");
83 for (
const auto &gpr : g_register_infos_riscv32_gpr) {
85 byte_offset += gpr.byte_size;
92 if (
m_fpregset.GetByteSize() >= g_register_infos_riscv32_fpr[0].byte_size) {
96 "FPR has the wrong number of registers!");
98 for (
const auto &fpr : g_register_infos_riscv32_fpr) {
100 byte_offset += fpr.byte_size;
112 std::vector<uint32_t> csregset_regnums = {};
114 uint32_t csr_addr =
m_csregset.GetU32(&offset);
117 llvm::formatv(
"parsed the permissible number of CSRs {0:x} but "
118 "NT_CSREGMAP has more; skipping the remaining CSRs",
122 if (llvm::is_contained(csregset_regnums, csr_addr)) {
124 llvm::formatv(
"encountered a duplicate CSR while parsing "
125 "NT_CSREGMAP: {0}; skipping",
126 reg_infos_riscv32_csr[csr_addr].name));
128 csregset_regnums.push_back(csr_addr);
129 const RegisterInfo &csr = reg_infos_riscv32_csr[csr_addr];
152 return &
m_reg_infos_up->GetRegisterInfo()[
static_cast<uint32_t
>(reg)];
162 return m_reg_infos_up->GetRegisterSet(
static_cast<uint32_t
>(set));
168 const uint8_t *src =
nullptr;
222 offset -= (g_register_infos_riscv32_gpr[0].byte_size *
278 offset -= ((g_register_infos_riscv32_gpr[0].byte_size *
280 (g_register_infos_riscv32_fpr[0].byte_size *
292 return error.Success();
307 .equals_insensitive(llvm::StringRef(
"GPR")))
316 .equals_insensitive(llvm::StringRef(
"FPR")))
325 .equals_insensitive(llvm::StringRef(
"CSR")))
360 auto process_sp =
m_thread.GetProcess();
364 auto target = process_sp->CalculateTarget();
368 auto module_sp = target->GetExecutableModule();
374 std::vector<std::string> raw_features =
375 module_sp->GetArchitecture().GetSubtargetFeatures().getFeatures();
377 if (raw_features.empty()) {
378 LLDB_LOG(log,
"no RISC-V subtarget feature found in module ArchSpec");
382 features.reserve(raw_features.size());
383 for (
const auto &feature : raw_features) {
384 if (feature.empty() || !llvm::SubtargetFeatures::isEnabled(feature))
386 auto stripped = llvm::SubtargetFeatures::StripFlag(feature);
387 if (!stripped.empty())
388 features.emplace_back(stripped);
static llvm::raw_ostream & error(Stream &strm)
#define LLDB_LOG(log,...)
The LLDB_LOG* macros defined below are the way to emit log messages.
const size_t k_num_gpr_registers
const size_t k_num_csr_registers
const size_t k_num_fpr_registers
static std::vector< uint32_t > CopyRegisterListToVector(const uint32_t *regs)
const lldb_private::RegisterInfo * GetRegisterInfoAtIndex(size_t reg) override
void InvalidateAllRegisters() override
lldb_private::DataExtractor m_csregset
static std::unique_ptr< RegisterContextCorePOSIX_riscv32 > Create(lldb_private::Thread &thread, const lldb_private::ArchSpec &arch, const lldb_private::DataExtractor &gpregset, llvm::ArrayRef< lldb_private::CoreNote > notes)
const lldb_private::RegisterSet * GetRegisterSet(size_t set) override
void GetFeatures(llvm::SmallVectorImpl< std::string > &features) const
Retrieves enabled RISC-V ISA extension feature names from the module's ArchSpec.
size_t GetRegisterCount() override
bool WriteRegister(const lldb_private::RegisterInfo *reg_info, const lldb_private::RegisterValue &value) override
RegisterContextCorePOSIX_riscv32(lldb_private::Thread &thread, std::unique_ptr< RegisterInfoPOSIXDynamic_riscv32 > register_info, const lldb_private::DataExtractor &gpregset, llvm::ArrayRef< lldb_private::CoreNote > notes)
size_t GetRegisterSetCount() override
bool ReadRegister(const lldb_private::RegisterInfo *reg_info, lldb_private::RegisterValue &value) override
std::unique_ptr< RegisterInfoPOSIXDynamic_riscv32 > m_reg_infos_up
lldb_private::DataExtractor m_fpregset
lldb_private::DataExtractor m_gpregset
~RegisterContextCorePOSIX_riscv32() override
lldb_private::DynamicRegisterInfo::Register BuildDynamicRegister(const lldb_private::RegisterInfo ®_info, const lldb_private::ConstString &set_name, uint32_t byte_offset)
An architecture specification class.
llvm::Triple & GetTriple()
Architecture triple accessor.
lldb::ByteOrder GetByteOrder() const
Returns the byte order for the architecture specification.
A uniqued constant string class.
static void ReportWarning(std::string message, std::optional< lldb::user_id_t > debugger_id=std::nullopt, std::once_flag *once=nullptr)
Report warning events.
RegisterContext(Thread &thread, uint32_t concrete_frame_idx)
uint32_t SetFromMemoryData(const RegisterInfo ®_info, const void *src, uint32_t src_len, lldb::ByteOrder src_byte_order, Status &error)
#define UNUSED_IF_ASSERT_DISABLED(x)
#define LLDB_INVALID_REGNUM
A class that represents a running process on the host machine.
Log * GetLog(Cat mask)
Retrieve the Log object for the channel associated with the given log enum.
constexpr RegsetDesc RISCV32_CSREGMAP_Desc[]
DataExtractor getRegset(llvm::ArrayRef< CoreNote > Notes, const llvm::Triple &Triple, llvm::ArrayRef< RegsetDesc > RegsetDescs)
constexpr RegsetDesc FPR_Desc[]
ByteOrder
Byte ordering definitions.
@ eRegisterKindGeneric
insn ptr reg, stack ptr reg, etc not specific to any particular target
@ eRegisterKindLLDB
lldb's internal register numbers
@ eRegisterKindDWARF
the register numbers seen DWARF
@ eRegisterKindEHFrame
the register numbers seen in eh_frame
@ eRegisterKindProcessPlugin
num used by the process plugin - e.g.
Every register is described in detail including its name, alternate name (optional),...
lldb::Encoding encoding
Encoding of the register bits.
const char * alt_name
Alternate name of this register, can be NULL.
uint32_t * value_regs
List of registers (terminated with LLDB_INVALID_REGNUM).
uint32_t byte_offset
The byte offset in the register context data where this register's value is found.
uint32_t byte_size
Size in bytes of the register.
uint32_t kinds[lldb::kNumRegisterKinds]
Holds all of the various register numbers for all register kinds.
const RegisterType * register_type
If not nullptr, a type defined by XML descriptions.
const char * name
Name of this register, can't be NULL.
lldb::Format format
Default display format.
uint32_t * invalidate_regs
List of registers (terminated with LLDB_INVALID_REGNUM).
Registers are grouped into register sets.
const char * name
Name of this register set.