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RegisterContextPOSIX_x86.cpp
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1 //===-- RegisterContextPOSIX_x86.cpp ----------------------------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 
9 #include <cstring>
10 #include <errno.h>
11 #include <stdint.h>
12 
13 #include "lldb/Target/Process.h"
14 #include "lldb/Target/Target.h"
15 #include "lldb/Target/Thread.h"
18 #include "lldb/Utility/Endian.h"
20 #include "lldb/Utility/Scalar.h"
21 #include "llvm/Support/Compiler.h"
22 
24 #include "RegisterContext_x86.h"
25 
26 using namespace lldb_private;
27 using namespace lldb;
28 
38  LLDB_INVALID_REGNUM, // Register sets must be terminated with
39  // LLDB_INVALID_REGNUM.
40 };
41 static_assert((sizeof(g_gpr_regnums_i386) / sizeof(g_gpr_regnums_i386[0])) -
42  1 ==
44  "g_gpr_regnums_i386 has wrong number of register infos");
45 
56  LLDB_INVALID_REGNUM // Register sets must be terminated with
57  // LLDB_INVALID_REGNUM.
58 };
59 static_assert((sizeof(g_lldb_regnums_i386) / sizeof(g_lldb_regnums_i386[0])) -
60  1 ==
62  "g_lldb_regnums_i386 has wrong number of register infos");
63 
67  LLDB_INVALID_REGNUM // Register sets must be terminated with
68  // LLDB_INVALID_REGNUM.
69 };
70 static_assert((sizeof(g_avx_regnums_i386) / sizeof(g_avx_regnums_i386[0])) -
71  1 ==
73  " g_avx_regnums_i386 has wrong number of register infos");
74 
75 static const uint32_t g_gpr_regnums_x86_64[] = {
84  lldb_r8d_x86_64, // Low 32 bits or r8
85  lldb_r9d_x86_64, // Low 32 bits or r9
86  lldb_r10d_x86_64, // Low 32 bits or r10
87  lldb_r11d_x86_64, // Low 32 bits or r11
88  lldb_r12d_x86_64, // Low 32 bits or r12
89  lldb_r13d_x86_64, // Low 32 bits or r13
90  lldb_r14d_x86_64, // Low 32 bits or r14
91  lldb_r15d_x86_64, // Low 32 bits or r15
94  lldb_r8w_x86_64, // Low 16 bits or r8
95  lldb_r9w_x86_64, // Low 16 bits or r9
96  lldb_r10w_x86_64, // Low 16 bits or r10
97  lldb_r11w_x86_64, // Low 16 bits or r11
98  lldb_r12w_x86_64, // Low 16 bits or r12
99  lldb_r13w_x86_64, // Low 16 bits or r13
100  lldb_r14w_x86_64, // Low 16 bits or r14
101  lldb_r15w_x86_64, // Low 16 bits or r15
105  lldb_r8l_x86_64, // Low 8 bits or r8
106  lldb_r9l_x86_64, // Low 8 bits or r9
107  lldb_r10l_x86_64, // Low 8 bits or r10
108  lldb_r11l_x86_64, // Low 8 bits or r11
109  lldb_r12l_x86_64, // Low 8 bits or r12
110  lldb_r13l_x86_64, // Low 8 bits or r13
111  lldb_r14l_x86_64, // Low 8 bits or r14
112  lldb_r15l_x86_64, // Low 8 bits or r15
113  LLDB_INVALID_REGNUM // Register sets must be terminated with
114  // LLDB_INVALID_REGNUM.
115 };
116 static_assert((sizeof(g_gpr_regnums_x86_64) / sizeof(g_gpr_regnums_x86_64[0])) -
117  1 ==
119  "g_gpr_regnums_x86_64 has wrong number of register infos");
120 
121 static const uint32_t g_lldb_regnums_x86_64[] = {
136  LLDB_INVALID_REGNUM // Register sets must be terminated with
137  // LLDB_INVALID_REGNUM.
138 };
139 static_assert((sizeof(g_lldb_regnums_x86_64) /
140  sizeof(g_lldb_regnums_x86_64[0])) -
141  1 ==
143  "g_lldb_regnums_x86_64 has wrong number of register infos");
144 
145 static const uint32_t g_avx_regnums_x86_64[] = {
150  LLDB_INVALID_REGNUM // Register sets must be terminated with
151  // LLDB_INVALID_REGNUM.
152 };
153 static_assert((sizeof(g_avx_regnums_x86_64) / sizeof(g_avx_regnums_x86_64[0])) -
154  1 ==
156  "g_avx_regnums_x86_64 has wrong number of register infos");
157 
174 
195 
228 
277 
278 // Number of register sets provided by this context.
280 
281 static const RegisterSet g_reg_sets_i386[k_num_register_sets] = {
282  {"General Purpose Registers", "gpr", k_num_gpr_registers_i386,
283  g_gpr_regnums_i386},
284  {"Floating Point Registers", "fpu", k_num_fpr_registers_i386,
285  g_lldb_regnums_i386},
286  {"Advanced Vector Extensions", "avx", k_num_avx_registers_i386,
287  g_avx_regnums_i386}};
288 
289 static const RegisterSet g_reg_sets_x86_64[k_num_register_sets] = {
290  {"General Purpose Registers", "gpr", k_num_gpr_registers_x86_64,
291  g_gpr_regnums_x86_64},
292  {"Floating Point Registers", "fpu", k_num_fpr_registers_x86_64,
293  g_lldb_regnums_x86_64},
294  {"Advanced Vector Extensions", "avx", k_num_avx_registers_x86_64,
295  g_avx_regnums_x86_64}};
296 
298  return reg <= m_reg_info.last_gpr; // GPR's come first.
299 }
300 
302  return (m_reg_info.first_fpr <= reg && reg <= m_reg_info.last_fpr);
303 }
304 
306  return (m_reg_info.first_ymm <= reg && reg <= m_reg_info.last_ymm);
307 }
308 
309 bool RegisterContextPOSIX_x86::IsFPR(unsigned reg, FPRType fpr_type) {
310  bool generic_fpr = IsFPR(reg);
311 
312  if (fpr_type == eXSAVE)
313  return generic_fpr || IsAVX(reg);
314  return generic_fpr;
315 }
316 
318  Thread &thread, uint32_t concrete_frame_idx,
319  RegisterInfoInterface *register_info)
320  : RegisterContext(thread, concrete_frame_idx) {
321  m_register_info_up.reset(register_info);
322 
323  switch (register_info->m_target_arch.GetMachine()) {
324  case llvm::Triple::x86:
342  break;
343  case llvm::Triple::x86_64:
361  break;
362  default:
363  assert(false && "Unhandled target architecture.");
364  break;
365  }
366 
367  ::memset(&m_fpr, 0, sizeof(FPR));
368 
370 }
371 
373 
375  if (m_fpr_type == eNotValid) {
376  // TODO: Use assembly to call cpuid on the inferior and query ebx or ecx
377  m_fpr_type = eXSAVE; // extended floating-point registers, if available
378  if (!ReadFPR())
379  m_fpr_type = eFXSAVE; // assume generic floating-point registers
380  }
381  return m_fpr_type;
382 }
383 
385 
387 
389  assert(reg < m_reg_info.num_registers && "Invalid register number.");
390  return GetRegisterInfo()[reg].byte_offset;
391 }
392 
394  assert(reg < m_reg_info.num_registers && "Invalid register number.");
395  return GetRegisterInfo()[reg].byte_size;
396 }
397 
399  size_t num_registers =
401  if (GetFPRType() == eXSAVE)
402  return num_registers + m_reg_info.num_avx_registers;
403  return num_registers;
404 }
405 
407  return m_register_info_up->GetGPRSize();
408 }
409 
411  return GetRegisterInfo()[m_reg_info.first_fpr].byte_offset;
412 }
413 
415  // Commonly, this method is overridden and g_register_infos is copied and
416  // specialized. So, use GetRegisterInfo() rather than g_register_infos in
417  // this scope.
418  return m_register_info_up->GetRegisterInfo();
419 }
420 
421 const RegisterInfo *
423  if (reg < m_reg_info.num_registers)
424  return &GetRegisterInfo()[reg];
425  else
426  return NULL;
427 }
428 
430  size_t sets = 0;
431  for (size_t set = 0; set < k_num_register_sets; ++set) {
432  if (IsRegisterSetAvailable(set))
433  ++sets;
434  }
435 
436  return sets;
437 }
438 
439 const RegisterSet *RegisterContextPOSIX_x86::GetRegisterSet(size_t set) {
440  if (IsRegisterSetAvailable(set)) {
441  switch (m_register_info_up->m_target_arch.GetMachine()) {
442  case llvm::Triple::x86:
443  return &g_reg_sets_i386[set];
444  case llvm::Triple::x86_64:
445  return &g_reg_sets_x86_64[set];
446  default:
447  assert(false && "Unhandled target architecture.");
448  return NULL;
449  }
450  }
451  return NULL;
452 }
453 
454 const char *RegisterContextPOSIX_x86::GetRegisterName(unsigned reg) {
455  assert(reg < m_reg_info.num_registers && "Invalid register offset.");
456  return GetRegisterInfo()[reg].name;
457 }
458 
460  // Get the target process whose privileged thread was used for the register
461  // read.
462  lldb::ByteOrder byte_order = eByteOrderInvalid;
463  Process *process = CalculateProcess().get();
464 
465  if (process)
466  byte_order = process->GetByteOrder();
467  return byte_order;
468 }
469 
470 // Parse ymm registers and into xmm.bytes and ymmh.bytes.
472  lldb::ByteOrder byte_order) {
473  if (!IsAVX(reg))
474  return false;
475 
476  if (byte_order == eByteOrderLittle) {
477  ::memcpy(m_fpr.fxsave.xmm[reg - m_reg_info.first_ymm].bytes,
478  m_ymm_set.ymm[reg - m_reg_info.first_ymm].bytes, sizeof(XMMReg));
479  ::memcpy(m_fpr.xsave.ymmh[reg - m_reg_info.first_ymm].bytes,
480  m_ymm_set.ymm[reg - m_reg_info.first_ymm].bytes + sizeof(XMMReg),
481  sizeof(YMMHReg));
482  return true;
483  }
484 
485  if (byte_order == eByteOrderBig) {
486  ::memcpy(m_fpr.fxsave.xmm[reg - m_reg_info.first_ymm].bytes,
487  m_ymm_set.ymm[reg - m_reg_info.first_ymm].bytes + sizeof(XMMReg),
488  sizeof(XMMReg));
489  ::memcpy(m_fpr.xsave.ymmh[reg - m_reg_info.first_ymm].bytes,
490  m_ymm_set.ymm[reg - m_reg_info.first_ymm].bytes, sizeof(YMMHReg));
491  return true;
492  }
493  return false; // unsupported or invalid byte order
494 }
495 
496 // Concatenate xmm.bytes with ymmh.bytes
498  lldb::ByteOrder byte_order) {
499  if (!IsAVX(reg))
500  return false;
501 
502  if (byte_order == eByteOrderLittle) {
503  ::memcpy(m_ymm_set.ymm[reg - m_reg_info.first_ymm].bytes,
505  sizeof(XMMReg));
506  ::memcpy(m_ymm_set.ymm[reg - m_reg_info.first_ymm].bytes + sizeof(XMMReg),
508  sizeof(YMMHReg));
509  return true;
510  }
511 
512  if (byte_order == eByteOrderBig) {
513  ::memcpy(m_ymm_set.ymm[reg - m_reg_info.first_ymm].bytes + sizeof(XMMReg),
515  sizeof(XMMReg));
516  ::memcpy(m_ymm_set.ymm[reg - m_reg_info.first_ymm].bytes,
518  sizeof(YMMHReg));
519  return true;
520  }
521  return false; // unsupported or invalid byte order
522 }
523 
525  // Note: Extended register sets are assumed to be at the end of g_reg_sets...
527 
528  if (GetFPRType() == eXSAVE) // ...and to start with AVX registers.
529  ++num_sets;
530  return (set_index < num_sets);
531 }
532 
533 // Used when parsing DWARF and EH frame information and any other object file
534 // sections that contain register numbers in them.
536  lldb::RegisterKind kind, uint32_t num) {
537  const uint32_t num_regs = GetRegisterCount();
538 
539  assert(kind < kNumRegisterKinds);
540  for (uint32_t reg_idx = 0; reg_idx < num_regs; ++reg_idx) {
541  const RegisterInfo *reg_info = GetRegisterInfoAtIndex(reg_idx);
542 
543  if (reg_info->kinds[kind] == num)
544  return reg_idx;
545  }
546 
547  return LLDB_INVALID_REGNUM;
548 }
virtual unsigned GetRegisterOffset(unsigned reg)
Enumerations for broadcasting.
Definition: SBLaunchInfo.h:14
virtual const lldb_private::RegisterInfo * GetRegisterInfo()
std::unique_ptr< lldb_private::RegisterInfoInterface > m_register_info_up
RegisterInfo interface to patch RegisterInfo structure for archs.
lldb::ByteOrder GetByteOrder() const
Definition: Process.cpp:3366
const uint32_t g_avx_regnums_i386[]
static const uint32_t g_avx_regnums_x86_64[]
static const uint32_t g_lldb_regnums_x86_64[]
RegisterContextPOSIX_x86(lldb_private::Thread &thread, uint32_t concrete_frame_idx, lldb_private::RegisterInfoInterface *register_info)
const uint32_t g_lldb_regnums_i386[]
uint32_t ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind, uint32_t num) override
Convert from a given register numbering scheme to the lldb register numbering scheme.
virtual unsigned GetRegisterSize(unsigned reg)
virtual bool IsRegisterSetAvailable(size_t set_index)
static const uint32_t g_gpr_regnums_x86_64[]
const char * GetRegisterName(unsigned reg)
A plug-in interface definition class for debugging a process.
Definition: Process.h:353
static const RegisterSet g_reg_sets_i386[k_num_register_sets]
static const RegisterSet g_reg_sets_x86_64[k_num_register_sets]
bool CopyYMMtoXSTATE(uint32_t reg, lldb::ByteOrder byte_order)
Definition: SBAddress.h:15
lldb::ProcessSP CalculateProcess() override
virtual bool ReadFPR()=0
const uint32_t g_gpr_regnums_i386[]
const lldb_private::RegisterInfo * GetRegisterInfoAtIndex(size_t reg) override
llvm::Triple::ArchType GetMachine() const
Returns a machine family for the current architecture.
Definition: ArchSpec.cpp:726
const lldb_private::RegisterSet * GetRegisterSet(size_t set) override
bool CopyXSTATEtoYMM(uint32_t reg, lldb::ByteOrder byte_order)
#define LLDB_INVALID_REGNUM
Definition: lldb-defines.h:90