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RegisterInfos_mips.h
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1 //===-- RegisterInfos_mips.h -----------------------------------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===---------------------------------------------------------------------===//
8 
9 #include <stddef.h>
10 
11 #include "lldb/Core/dwarf.h"
12 #include "llvm/Support/Compiler.h"
13 
14 
15 #ifdef DECLARE_REGISTER_INFOS_MIPS_STRUCT
16 
17 // Computes the offset of the given GPR in the user data area.
18 #define GPR_OFFSET(regname) \
19  (LLVM_EXTENSION offsetof(UserArea, gpr) + \
20  LLVM_EXTENSION offsetof(GPR_linux_mips, regname))
21 
22 // Computes the offset of the given FPR in the extended data area.
23 #define FPR_OFFSET(regname) \
24  (LLVM_EXTENSION offsetof(UserArea, fpr) + \
25  LLVM_EXTENSION offsetof(FPR_linux_mips, regname))
26 
27 // Computes the offset of the given MSA in the extended data area.
28 #define MSA_OFFSET(regname) \
29  (LLVM_EXTENSION offsetof(UserArea, msa) + \
30  LLVM_EXTENSION offsetof(MSA_linux_mips, regname))
31 
32 // Note that the size and offset will be updated by platform-specific classes.
33 #define DEFINE_GPR(reg, alt, kind1, kind2, kind3) \
34  { \
35  #reg, alt, sizeof(((GPR_linux_mips *) NULL)->reg) / 2, \
36  GPR_OFFSET(reg), eEncodingUint, eFormatHex, \
37  {kind1, kind2, kind3, ptrace_##reg##_mips, \
38  gpr_##reg##_mips }, \
39  NULL, NULL, NULL, 0 \
40  }
41 
42 const uint8_t dwarf_opcode_mips[] = {
43  llvm::dwarf::DW_OP_regx, dwarf_sr_mips, llvm::dwarf::DW_OP_lit1,
44  llvm::dwarf::DW_OP_lit26, llvm::dwarf::DW_OP_shl, llvm::dwarf::DW_OP_and,
45  llvm::dwarf::DW_OP_lit26, llvm::dwarf::DW_OP_shr};
46 
47 #define DEFINE_FPR(reg, alt, kind1, kind2, kind3) \
48  { \
49  #reg, alt, sizeof(((FPR_linux_mips *) NULL)->reg), \
50  FPR_OFFSET(reg), eEncodingIEEE754, eFormatFloat, \
51  {kind1, kind2, kind3, ptrace_##reg##_mips, \
52  fpr_##reg##_mips }, \
53  NULL, NULL, dwarf_opcode_mips, \
54  sizeof(dwarf_opcode_mips) \
55  }
56 
57 #define DEFINE_FPR_INFO(reg, alt, kind1, kind2, kind3) \
58  { \
59  #reg, alt, sizeof(((FPR_linux_mips *) NULL)->reg), \
60  FPR_OFFSET(reg), eEncodingUint, eFormatHex, \
61  {kind1, kind2, kind3, ptrace_##reg##_mips, \
62  fpr_##reg##_mips }, \
63  NULL, NULL, NULL, 0 \
64  }
65 
66 #define DEFINE_MSA(reg, alt, kind1, kind2, kind3, kind4) \
67  { \
68  #reg, alt, sizeof(((MSA_linux_mips *) 0)->reg), \
69  MSA_OFFSET(reg), eEncodingVector, eFormatVectorOfUInt8, \
70  {kind1, kind2, kind3, kind4, \
71  msa_##reg##_mips }, \
72  NULL, NULL, NULL, 0 \
73  }
74 
75 #define DEFINE_MSA_INFO(reg, alt, kind1, kind2, kind3, kind4) \
76  { \
77  #reg, alt, sizeof(((MSA_linux_mips *) 0)->reg), \
78  MSA_OFFSET(reg), eEncodingUint, eFormatHex, \
79  {kind1, kind2, kind3, kind4, \
80  msa_##reg##_mips }, \
81  NULL, NULL, NULL, 0 \
82  }
83 
84 // RegisterKind: EH_Frame, DWARF, Generic, Procss Plugin, LLDB
85 
86 static RegisterInfo g_register_infos_mips[] = {
143  DEFINE_GPR(sr, "status", dwarf_sr_mips, dwarf_sr_mips,
145  DEFINE_GPR(mullo, nullptr, dwarf_lo_mips, dwarf_lo_mips,
147  DEFINE_GPR(mulhi, nullptr, dwarf_hi_mips, dwarf_hi_mips,
149  DEFINE_GPR(badvaddr, nullptr, dwarf_bad_mips, dwarf_bad_mips,
157  DEFINE_FPR(f0, nullptr, dwarf_f0_mips, dwarf_f0_mips, LLDB_INVALID_REGNUM),
158  DEFINE_FPR(f1, nullptr, dwarf_f1_mips, dwarf_f1_mips, LLDB_INVALID_REGNUM),
159  DEFINE_FPR(f2, nullptr, dwarf_f2_mips, dwarf_f2_mips, LLDB_INVALID_REGNUM),
160  DEFINE_FPR(f3, nullptr, dwarf_f3_mips, dwarf_f3_mips, LLDB_INVALID_REGNUM),
161  DEFINE_FPR(f4, nullptr, dwarf_f4_mips, dwarf_f4_mips, LLDB_INVALID_REGNUM),
162  DEFINE_FPR(f5, nullptr, dwarf_f5_mips, dwarf_f5_mips, LLDB_INVALID_REGNUM),
163  DEFINE_FPR(f6, nullptr, dwarf_f6_mips, dwarf_f6_mips, LLDB_INVALID_REGNUM),
164  DEFINE_FPR(f7, nullptr, dwarf_f7_mips, dwarf_f7_mips, LLDB_INVALID_REGNUM),
165  DEFINE_FPR(f8, nullptr, dwarf_f8_mips, dwarf_f8_mips, LLDB_INVALID_REGNUM),
166  DEFINE_FPR(f9, nullptr, dwarf_f9_mips, dwarf_f9_mips, LLDB_INVALID_REGNUM),
167  DEFINE_FPR(f10, nullptr, dwarf_f10_mips, dwarf_f10_mips,
169  DEFINE_FPR(f11, nullptr, dwarf_f11_mips, dwarf_f11_mips,
171  DEFINE_FPR(f12, nullptr, dwarf_f12_mips, dwarf_f12_mips,
173  DEFINE_FPR(f13, nullptr, dwarf_f13_mips, dwarf_f13_mips,
175  DEFINE_FPR(f14, nullptr, dwarf_f14_mips, dwarf_f14_mips,
177  DEFINE_FPR(f15, nullptr, dwarf_f15_mips, dwarf_f15_mips,
179  DEFINE_FPR(f16, nullptr, dwarf_f16_mips, dwarf_f16_mips,
181  DEFINE_FPR(f17, nullptr, dwarf_f17_mips, dwarf_f17_mips,
183  DEFINE_FPR(f18, nullptr, dwarf_f18_mips, dwarf_f18_mips,
185  DEFINE_FPR(f19, nullptr, dwarf_f19_mips, dwarf_f19_mips,
187  DEFINE_FPR(f20, nullptr, dwarf_f20_mips, dwarf_f20_mips,
189  DEFINE_FPR(f21, nullptr, dwarf_f21_mips, dwarf_f21_mips,
191  DEFINE_FPR(f22, nullptr, dwarf_f22_mips, dwarf_f22_mips,
193  DEFINE_FPR(f23, nullptr, dwarf_f23_mips, dwarf_f23_mips,
195  DEFINE_FPR(f24, nullptr, dwarf_f24_mips, dwarf_f24_mips,
197  DEFINE_FPR(f25, nullptr, dwarf_f25_mips, dwarf_f25_mips,
199  DEFINE_FPR(f26, nullptr, dwarf_f26_mips, dwarf_f26_mips,
201  DEFINE_FPR(f27, nullptr, dwarf_f27_mips, dwarf_f27_mips,
203  DEFINE_FPR(f28, nullptr, dwarf_f28_mips, dwarf_f28_mips,
205  DEFINE_FPR(f29, nullptr, dwarf_f29_mips, dwarf_f29_mips,
207  DEFINE_FPR(f30, nullptr, dwarf_f30_mips, dwarf_f30_mips,
209  DEFINE_FPR(f31, nullptr, dwarf_f31_mips, dwarf_f31_mips,
211  DEFINE_FPR_INFO(fcsr, nullptr, dwarf_fcsr_mips, dwarf_fcsr_mips,
213  DEFINE_FPR_INFO(fir, nullptr, dwarf_fir_mips, dwarf_fir_mips,
215  DEFINE_FPR_INFO(config5, nullptr, dwarf_config5_mips, dwarf_config5_mips,
217  DEFINE_MSA(w0, nullptr, dwarf_w0_mips, dwarf_w0_mips, LLDB_INVALID_REGNUM,
219  DEFINE_MSA(w1, nullptr, dwarf_w1_mips, dwarf_w1_mips, LLDB_INVALID_REGNUM,
221  DEFINE_MSA(w2, nullptr, dwarf_w2_mips, dwarf_w2_mips, LLDB_INVALID_REGNUM,
223  DEFINE_MSA(w3, nullptr, dwarf_w3_mips, dwarf_w3_mips, LLDB_INVALID_REGNUM,
225  DEFINE_MSA(w4, nullptr, dwarf_w4_mips, dwarf_w4_mips, LLDB_INVALID_REGNUM,
227  DEFINE_MSA(w5, nullptr, dwarf_w5_mips, dwarf_w5_mips, LLDB_INVALID_REGNUM,
229  DEFINE_MSA(w6, nullptr, dwarf_w6_mips, dwarf_w6_mips, LLDB_INVALID_REGNUM,
231  DEFINE_MSA(w7, nullptr, dwarf_w7_mips, dwarf_w7_mips, LLDB_INVALID_REGNUM,
233  DEFINE_MSA(w8, nullptr, dwarf_w8_mips, dwarf_w8_mips, LLDB_INVALID_REGNUM,
235  DEFINE_MSA(w9, nullptr, dwarf_w9_mips, dwarf_w9_mips, LLDB_INVALID_REGNUM,
237  DEFINE_MSA(w10, nullptr, dwarf_w10_mips, dwarf_w10_mips,
239  DEFINE_MSA(w11, nullptr, dwarf_w11_mips, dwarf_w11_mips,
241  DEFINE_MSA(w12, nullptr, dwarf_w12_mips, dwarf_w12_mips,
243  DEFINE_MSA(w13, nullptr, dwarf_w13_mips, dwarf_w13_mips,
245  DEFINE_MSA(w14, nullptr, dwarf_w14_mips, dwarf_w14_mips,
247  DEFINE_MSA(w15, nullptr, dwarf_w15_mips, dwarf_w15_mips,
249  DEFINE_MSA(w16, nullptr, dwarf_w16_mips, dwarf_w16_mips,
251  DEFINE_MSA(w17, nullptr, dwarf_w17_mips, dwarf_w17_mips,
253  DEFINE_MSA(w18, nullptr, dwarf_w18_mips, dwarf_w18_mips,
255  DEFINE_MSA(w19, nullptr, dwarf_w19_mips, dwarf_w19_mips,
257  DEFINE_MSA(w20, nullptr, dwarf_w10_mips, dwarf_w20_mips,
259  DEFINE_MSA(w21, nullptr, dwarf_w21_mips, dwarf_w21_mips,
261  DEFINE_MSA(w22, nullptr, dwarf_w22_mips, dwarf_w22_mips,
263  DEFINE_MSA(w23, nullptr, dwarf_w23_mips, dwarf_w23_mips,
265  DEFINE_MSA(w24, nullptr, dwarf_w24_mips, dwarf_w24_mips,
267  DEFINE_MSA(w25, nullptr, dwarf_w25_mips, dwarf_w25_mips,
269  DEFINE_MSA(w26, nullptr, dwarf_w26_mips, dwarf_w26_mips,
271  DEFINE_MSA(w27, nullptr, dwarf_w27_mips, dwarf_w27_mips,
273  DEFINE_MSA(w28, nullptr, dwarf_w28_mips, dwarf_w28_mips,
275  DEFINE_MSA(w29, nullptr, dwarf_w29_mips, dwarf_w29_mips,
277  DEFINE_MSA(w30, nullptr, dwarf_w30_mips, dwarf_w30_mips,
279  DEFINE_MSA(w31, nullptr, dwarf_w31_mips, dwarf_w31_mips,
281  DEFINE_MSA_INFO(mcsr, nullptr, dwarf_mcsr_mips, dwarf_mcsr_mips,
283  DEFINE_MSA_INFO(mir, nullptr, dwarf_mir_mips, dwarf_mir_mips,
285  DEFINE_MSA_INFO(fcsr, nullptr, dwarf_fcsr_mips, dwarf_fcsr_mips,
287  DEFINE_MSA_INFO(fir, nullptr, dwarf_fir_mips, dwarf_fir_mips,
289  DEFINE_MSA_INFO(config5, nullptr, dwarf_config5_mips, dwarf_config5_mips,
291 
292 static_assert((sizeof(g_register_infos_mips) /
293  sizeof(g_register_infos_mips[0])) == k_num_registers_mips,
294  "g_register_infos_mips has wrong number of register infos");
295 
296 #undef GPR_OFFSET
297 #undef FPR_OFFSET
298 #undef MSA_OFFSET
299 #undef DEFINE_GPR
300 #undef DEFINE_FPR
301 #undef DEFINE_FPR_INFO
302 #undef DEFINE_MSA
303 #undef DEFINE_MSA_INFO
304 
305 #endif // DECLARE_REGISTER_INFOS_MIPS_STRUCT
#define LLDB_REGNUM_GENERIC_PC
Definition: lldb-defines.h:63
#define LLDB_REGNUM_GENERIC_RA
Definition: lldb-defines.h:66
#define LLDB_REGNUM_GENERIC_ARG4
Definition: lldb-defines.h:74
#define LLDB_REGNUM_GENERIC_ARG2
Definition: lldb-defines.h:70
#define LLDB_REGNUM_GENERIC_SP
Definition: lldb-defines.h:64
#define LLDB_REGNUM_GENERIC_ARG1
Definition: lldb-defines.h:68
#define LLDB_REGNUM_GENERIC_FP
Definition: lldb-defines.h:65
#define LLDB_REGNUM_GENERIC_FLAGS
Definition: lldb-defines.h:67
#define DEFINE_GPR(reg, alt, kind1, kind2, kind3, kind4)
#define LLDB_REGNUM_GENERIC_ARG3
Definition: lldb-defines.h:72
#define LLDB_INVALID_REGNUM
Definition: lldb-defines.h:90