20 #include "llvm/ADT/STLExtras.h"
21 #include "llvm/Support/Compiler.h"
27 #if defined(__APPLE__) && (defined(__arm64__) || defined(__aarch64__))
28 #include <sys/types.h>
29 #include <sys/sysctl.h>
37 #define GPR_OFFSET(idx) ((idx)*8)
38 #define GPR_OFFSET_NAME(reg) \
39 (LLVM_EXTENSION offsetof(RegisterContextDarwin_arm64::GPR, reg))
41 #define FPU_OFFSET(idx) ((idx)*16 + sizeof(RegisterContextDarwin_arm64::GPR))
42 #define FPU_OFFSET_NAME(reg) \
43 (LLVM_EXTENSION offsetof(RegisterContextDarwin_arm64::FPU, reg))
45 #define EXC_OFFSET_NAME(reg) \
46 (LLVM_EXTENSION offsetof(RegisterContextDarwin_arm64::EXC, reg) + \
47 sizeof(RegisterContextDarwin_arm64::GPR) + \
48 sizeof(RegisterContextDarwin_arm64::FPU))
49 #define DBG_OFFSET_NAME(reg) \
50 (LLVM_EXTENSION offsetof(RegisterContextDarwin_arm64::DBG, reg) + \
51 sizeof(RegisterContextDarwin_arm64::GPR) + \
52 sizeof(RegisterContextDarwin_arm64::FPU) + \
53 sizeof(RegisterContextDarwin_arm64::EXC))
55 #define DEFINE_DBG(reg, i) \
57 sizeof(((RegisterContextDarwin_arm64::DBG *) NULL)->reg[i]), \
58 DBG_OFFSET_NAME(reg[i]), eEncodingUint, eFormatHex, \
59 {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
60 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
61 LLDB_INVALID_REGNUM }, \
63 #define REG_CONTEXT_SIZE \
64 (sizeof(RegisterContextDarwin_arm64::GPR) + \
65 sizeof(RegisterContextDarwin_arm64::FPU) + \
66 sizeof(RegisterContextDarwin_arm64::EXC))
69 #define DECLARE_REGISTER_INFOS_ARM64_STRUCT
71 #undef DECLARE_REGISTER_INFOS_ARM64_STRUCT
75 gpr_x0, gpr_x1, gpr_x2, gpr_x3, gpr_x4, gpr_x5, gpr_x6,
76 gpr_x7, gpr_x8, gpr_x9, gpr_x10, gpr_x11, gpr_x12, gpr_x13,
77 gpr_x14, gpr_x15, gpr_x16, gpr_x17, gpr_x18, gpr_x19, gpr_x20,
78 gpr_x21, gpr_x22, gpr_x23, gpr_x24, gpr_x25, gpr_x26, gpr_x27,
83 fpu_v0, fpu_v1, fpu_v2, fpu_v3, fpu_v4, fpu_v5, fpu_v6,
84 fpu_v7, fpu_v8, fpu_v9, fpu_v10, fpu_v11, fpu_v12, fpu_v13,
85 fpu_v14, fpu_v15, fpu_v16, fpu_v17, fpu_v18, fpu_v19, fpu_v20,
86 fpu_v21, fpu_v22, fpu_v23, fpu_v24, fpu_v25, fpu_v26, fpu_v27,
87 fpu_v28, fpu_v29, fpu_v30, fpu_v31, fpu_fpsr, fpu_fpcr};
94 llvm::array_lengthof(g_register_infos_arm64_le);
122 return &g_register_infos_arm64_le[reg];
131 return g_register_infos_arm64_le;
287 "BVR%-2u/BCR%-2u = { 0x%8.8" PRIu64
", 0x%8.8" PRIu64
288 " } WVR%-2u/WCR%-2u "
289 "= { 0x%8.8" PRIu64
", 0x%8.8" PRIu64
" }",
383 if (process_sp.get()) {
385 process_sp->GetAddressByteSize());
387 uint64_t retval = regdata.
GetMaxU64(&offset, 8);
462 if (process_sp.get()) {
464 process_sp->GetAddressByteSize());
503 if (process_sp.get()) {
505 process_sp->GetAddressByteSize());
646 lldb::WritableDataBufferSP &data_sp) {
650 uint8_t *dst = data_sp->GetBytes();
651 ::memcpy(dst, &
gpr,
sizeof(
gpr));
654 ::memcpy(dst, &
fpu,
sizeof(
fpu));
657 ::memcpy(dst, &
exc,
sizeof(
exc));
664 const lldb::DataBufferSP &data_sp) {
666 const uint8_t *src = data_sp->GetBytes();
667 ::memcpy(&
gpr, src,
sizeof(
gpr));
670 ::memcpy(&
fpu, src,
sizeof(
fpu));
673 ::memcpy(&
exc, src,
sizeof(
exc));
681 return success_count == 3;
921 #if defined(__APPLE__) && (defined(__arm64__) || defined(__aarch64__))
924 if (g_num_supported_hw_watchpoints ==
UINT32_MAX) {
928 if (::sysctlbyname(
"hw.optional.watchpoint", &n, &len, NULL, 0) == 0) {
929 g_num_supported_hw_watchpoints = n;
932 return g_num_supported_hw_watchpoints;
965 uint32_t addr_word_offset = addr % 4;
970 uint32_t byte_mask = ((1u << size) - 1u) << addr_word_offset;
974 if (byte_mask > 0xfu)
984 for (i = 0; i < num_hw_watchpoints; ++i) {
990 if (i < num_hw_watchpoints) {
992 uint32_t byte_address_select = byte_mask << 5;
995 dbg.
wcr[i] = byte_address_select |
1024 if (hw_index < num_hw_points) {