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RegisterInfoPOSIX_arm64.cpp
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1 //===-- RegisterInfoPOSIX_arm64.cpp ----------------------------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===---------------------------------------------------------------------===//
8 
9 #include <cassert>
10 #include <stddef.h>
11 #include <vector>
12 
13 #include "lldb/lldb-defines.h"
14 #include "llvm/Support/Compiler.h"
15 
17 
18 // Based on RegisterContextDarwin_arm64.cpp
19 #define GPR_OFFSET(idx) ((idx)*8)
20 #define GPR_OFFSET_NAME(reg) \
21  (LLVM_EXTENSION offsetof(RegisterInfoPOSIX_arm64::GPR, reg))
22 
23 #define FPU_OFFSET(idx) ((idx)*16 + sizeof(RegisterInfoPOSIX_arm64::GPR))
24 #define FPU_OFFSET_NAME(reg) \
25  (LLVM_EXTENSION offsetof(RegisterInfoPOSIX_arm64::FPU, reg) + \
26  sizeof(RegisterInfoPOSIX_arm64::GPR))
27 
28 #define EXC_OFFSET_NAME(reg) \
29  (LLVM_EXTENSION offsetof(RegisterInfoPOSIX_arm64::EXC, reg) + \
30  sizeof(RegisterInfoPOSIX_arm64::GPR) + \
31  sizeof(RegisterInfoPOSIX_arm64::FPU))
32 #define DBG_OFFSET_NAME(reg) \
33  (LLVM_EXTENSION offsetof(RegisterInfoPOSIX_arm64::DBG, reg) + \
34  sizeof(RegisterInfoPOSIX_arm64::GPR) + \
35  sizeof(RegisterInfoPOSIX_arm64::FPU) + \
36  sizeof(RegisterInfoPOSIX_arm64::EXC))
37 
38 #define DEFINE_DBG(reg, i) \
39  #reg, NULL, \
40  sizeof(((RegisterInfoPOSIX_arm64::DBG *) NULL)->reg[i]), \
41  DBG_OFFSET_NAME(reg[i]), lldb::eEncodingUint, lldb::eFormatHex, \
42  {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
43  LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \
44  dbg_##reg##i }, \
45  NULL, NULL, NULL, 0
46 #define REG_CONTEXT_SIZE \
47  (sizeof(RegisterInfoPOSIX_arm64::GPR) + \
48  sizeof(RegisterInfoPOSIX_arm64::FPU) + \
49  sizeof(RegisterInfoPOSIX_arm64::EXC))
50 
51 // Include RegisterInfos_arm64 to declare our g_register_infos_arm64 structure.
52 #define DECLARE_REGISTER_INFOS_ARM64_STRUCT
53 #include "RegisterInfos_arm64.h"
54 #undef DECLARE_REGISTER_INFOS_ARM64_STRUCT
55 
56 static const lldb_private::RegisterInfo *
58  switch (target_arch.GetMachine()) {
59  case llvm::Triple::aarch64:
60  return g_register_infos_arm64_le;
61  default:
62  assert(false && "Unhandled target architecture.");
63  return NULL;
64  }
65 }
66 
67 static uint32_t
69  switch (target_arch.GetMachine()) {
70  case llvm::Triple::aarch64:
71  return static_cast<uint32_t>(sizeof(g_register_infos_arm64_le) /
72  sizeof(g_register_infos_arm64_le[0]));
73  default:
74  assert(false && "Unhandled target architecture.");
75  return 0;
76  }
77 }
78 
80  const lldb_private::ArchSpec &target_arch)
81  : lldb_private::RegisterInfoInterface(target_arch),
82  m_register_info_p(GetRegisterInfoPtr(target_arch)),
83  m_register_info_count(GetRegisterInfoCount(target_arch)) {}
84 
86  return sizeof(struct RegisterInfoPOSIX_arm64::GPR);
87 }
88 
89 const lldb_private::RegisterInfo *
91  return m_register_info_p;
92 }
93 
95  return m_register_info_count;
96 }
Enumerations for broadcasting.
Definition: SBLaunchInfo.h:14
static const lldb_private::RegisterInfo * GetRegisterInfoPtr(const lldb_private::ArchSpec &target_arch)
An architecture specification class.
Definition: ArchSpec.h:32
uint32_t GetRegisterCount() const override
static uint32_t GetRegisterInfoCount(const lldb_private::ArchSpec &target_arch)
RegisterInfoPOSIX_arm64(const lldb_private::ArchSpec &target_arch)
const lldb_private::RegisterInfo * GetRegisterInfo() const override
size_t GetGPRSize() const override
llvm::Triple::ArchType GetMachine() const
Returns a machine family for the current architecture.
Definition: ArchSpec.cpp:726