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RegisterInfoPOSIX_loongarch64.cpp
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1//===-- RegisterInfoPOSIX_loongarch64.cpp --------------------------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===---------------------------------------------------------------------===//
8
9#include <cassert>
10#include <lldb/Utility/Flags.h>
11#include <stddef.h>
12
13#include "lldb/lldb-defines.h"
14#include "llvm/Support/Compiler.h"
15
17
18#define GPR_OFFSET(idx) ((idx)*8 + 0)
19#define FPR_OFFSET(idx) ((idx)*8 + sizeof(RegisterInfoPOSIX_loongarch64::GPR))
20#define FCC_OFFSET(idx) ((idx)*1 + 32 * 8 + sizeof(RegisterInfoPOSIX_loongarch64::GPR))
21#define FCSR_OFFSET (8 * 1 + 32 * 8 + sizeof(RegisterInfoPOSIX_loongarch64::GPR))
22#define LSX_OFFSET(idx) \
23 ((idx) * 16 + sizeof(RegisterInfoPOSIX_loongarch64::GPR) + \
24 sizeof(RegisterInfoPOSIX_loongarch64::FPR))
25#define LASX_OFFSET(idx) \
26 ((idx) * 32 + sizeof(RegisterInfoPOSIX_loongarch64::GPR) + \
27 sizeof(RegisterInfoPOSIX_loongarch64::FPR) + \
28 sizeof(RegisterInfoPOSIX_loongarch64::LSX))
29
30#define REG_CONTEXT_SIZE \
31 (sizeof(RegisterInfoPOSIX_loongarch64::GPR) + \
32 sizeof(RegisterInfoPOSIX_loongarch64::FPR) + \
33 sizeof(RegisterInfoPOSIX_loongarch64::LSX) + \
34 sizeof(RegisterInfoPOSIX_loongarch64::LASX))
35
36#define DECLARE_REGISTER_INFOS_LOONGARCH64_STRUCT
38#undef DECLARE_REGISTER_INFOS_LOONGARCH64_STRUCT
39
42 const lldb_private::ArchSpec &target_arch) {
43 switch (target_arch.GetMachine()) {
44 case llvm::Triple::loongarch64:
45 return g_register_infos_loongarch64;
46 default:
47 assert(false && "Unhandled target architecture.");
48 return nullptr;
49 }
50}
51
53 const lldb_private::ArchSpec &target_arch) {
54 switch (target_arch.GetMachine()) {
55 case llvm::Triple::loongarch64:
56 return static_cast<uint32_t>(sizeof(g_register_infos_loongarch64) /
57 sizeof(g_register_infos_loongarch64[0]));
58 default:
59 assert(false && "Unhandled target architecture.");
60 return 0;
61 }
62}
63
64// Number of register sets provided by this context.
65enum {
71};
72
73// LoongArch64 general purpose registers.
74static const uint32_t g_gpr_regnums_loongarch64[] = {
91
92static_assert(((sizeof g_gpr_regnums_loongarch64 /
93 sizeof g_gpr_regnums_loongarch64[0]) -
95 "g_gpr_regnums_loongarch64 has wrong number of register infos");
96
97// LoongArch64 floating point registers.
98static const uint32_t g_fpr_regnums_loongarch64[] = {
113
114static_assert(((sizeof g_fpr_regnums_loongarch64 /
115 sizeof g_fpr_regnums_loongarch64[0]) -
117 "g_fpr_regnums_loongarch64 has wrong number of register infos");
118
119// LoongArch64 lsx vector registers.
120static const uint32_t g_lsx_regnums_loongarch64[] = {
132
133static_assert(((sizeof g_lsx_regnums_loongarch64 /
134 sizeof g_lsx_regnums_loongarch64[0]) -
136 "g_lsx_regnums_loongarch64 has wrong number of register infos");
137
138// LoongArch64 lasx vector registers.
139static const uint32_t g_lasx_regnums_loongarch64[] = {
151
152static_assert(((sizeof g_lasx_regnums_loongarch64 /
153 sizeof g_lasx_regnums_loongarch64[0]) -
155 "g_lasx_regnums_loongarch64 has wrong number of register infos");
156
157// Register sets for LoongArch64.
158static const lldb_private::RegisterSet
160 {"General Purpose Registers", "gpr", k_num_gpr_registers,
162 {"Floating Point Registers", "fpr", k_num_fpr_registers,
164 {"LSX Vector Registers", "lsx", k_num_lsx_registers,
166 {"LASX Vector Registers", "lasx", k_num_lasx_registers,
168
170 const lldb_private::ArchSpec &target_arch, lldb_private::Flags flags)
171 : lldb_private::RegisterInfoAndSetInterface(target_arch),
172 m_register_info_p(GetRegisterInfoPtr(target_arch)),
173 m_register_info_count(GetRegisterInfoCount(target_arch)) {}
174
177}
178
180 return sizeof(struct RegisterInfoPOSIX_loongarch64::GPR);
181}
182
184 return sizeof(struct RegisterInfoPOSIX_loongarch64::FPR);
185}
186
189 return m_register_info_p;
190}
191
193 return k_num_register_sets;
194}
195
197 uint32_t reg_index) const {
198 // coverity[unsigned_compare]
199 if (reg_index >= gpr_first_loongarch && reg_index <= gpr_last_loongarch)
200 return GPRegSet;
201 if (reg_index >= fpr_first_loongarch && reg_index <= fpr_last_loongarch)
202 return FPRegSet;
203 if (reg_index >= lsx_first_loongarch && reg_index <= lsx_last_loongarch)
204 return LSXRegSet;
205 if (reg_index >= lasx_first_loongarch && reg_index <= lasx_last_loongarch)
206 return LASXRegSet;
207 return LLDB_INVALID_REGNUM;
208}
209
212 if (set_index < GetRegisterSetCount())
213 return &g_reg_sets_loongarch64[set_index];
214 return nullptr;
215}
constexpr size_t k_num_register_sets
static const RegisterInfo * GetRegisterInfoPtr(const ArchSpec &target_arch)
static uint32_t GetRegisterInfoCount(const ArchSpec &target_arch)
static const uint32_t g_lasx_regnums_loongarch64[]
static const uint32_t g_lsx_regnums_loongarch64[]
static const lldb_private::RegisterSet g_reg_sets_loongarch64[k_num_register_sets]
static const uint32_t g_fpr_regnums_loongarch64[]
static const uint32_t g_gpr_regnums_loongarch64[]
size_t GetRegisterSetFromRegisterIndex(uint32_t reg_index) const override
static const lldb_private::RegisterInfo * GetRegisterInfoPtr(const lldb_private::ArchSpec &target_arch)
const lldb_private::RegisterSet * GetRegisterSet(size_t reg_set) const override
const lldb_private::RegisterInfo * m_register_info_p
static uint32_t GetRegisterInfoCount(const lldb_private::ArchSpec &target_arch)
const lldb_private::RegisterInfo * GetRegisterInfo() const override
RegisterInfoPOSIX_loongarch64(const lldb_private::ArchSpec &target_arch, lldb_private::Flags flags)
An architecture specification class.
Definition: ArchSpec.h:31
llvm::Triple::ArchType GetMachine() const
Returns a machine family for the current architecture.
Definition: ArchSpec.cpp:704
A class to manage flags.
Definition: Flags.h:22
#define LLDB_INVALID_REGNUM
Definition: lldb-defines.h:87
A class that represents a running process on the host machine.
Every register is described in detail including its name, alternate name (optional),...
Registers are grouped into register sets.