23 #include "llvm-c/Disassembler.h"
24 #include "llvm/MC/MCAsmInfo.h"
25 #include "llvm/MC/MCContext.h"
26 #include "llvm/MC/MCDisassembler/MCDisassembler.h"
27 #include "llvm/MC/MCInst.h"
28 #include "llvm/MC/MCInstrInfo.h"
29 #include "llvm/MC/MCRegisterInfo.h"
30 #include "llvm/MC/MCSubtargetInfo.h"
31 #include "llvm/MC/MCTargetOptions.h"
32 #include "llvm/MC/TargetRegistry.h"
33 #include "llvm/Support/TargetSelect.h"
35 #include "llvm/ADT/STLExtras.h"
45 #define UInt(x) ((uint64_t)x)
46 #define integer int64_t
54 void LLVMInitializeMipsTargetInfo();
55 void LLVMInitializeMipsTarget();
56 void LLVMInitializeMipsAsmPrinter();
57 void LLVMInitializeMipsTargetMC();
58 void LLVMInitializeMipsDisassembler();
68 const llvm::Target *target =
69 llvm::TargetRegistry::lookupTarget(triple.getTriple(),
Status);
81 LLVMInitializeMipsTargetInfo();
82 LLVMInitializeMipsTarget();
83 LLVMInitializeMipsAsmPrinter();
84 LLVMInitializeMipsTargetMC();
85 LLVMInitializeMipsDisassembler();
86 target = llvm::TargetRegistry::lookupTarget(triple.getTriple(),
Status);
95 case ArchSpec::eCore_mips32:
96 case ArchSpec::eCore_mips32el:
99 case ArchSpec::eCore_mips32r2:
100 case ArchSpec::eCore_mips32r2el:
103 case ArchSpec::eCore_mips32r3:
104 case ArchSpec::eCore_mips32r3el:
107 case ArchSpec::eCore_mips32r5:
108 case ArchSpec::eCore_mips32r5el:
111 case ArchSpec::eCore_mips32r6:
112 case ArchSpec::eCore_mips32r6el:
115 case ArchSpec::eCore_mips64:
116 case ArchSpec::eCore_mips64el:
119 case ArchSpec::eCore_mips64r2:
120 case ArchSpec::eCore_mips64r2el:
123 case ArchSpec::eCore_mips64r3:
124 case ArchSpec::eCore_mips64r3el:
127 case ArchSpec::eCore_mips64r5:
128 case ArchSpec::eCore_mips64r5el:
131 case ArchSpec::eCore_mips64r6:
132 case ArchSpec::eCore_mips64r6el:
142 if (arch_flags & ArchSpec::eMIPSAse_msa)
144 if (arch_flags & ArchSpec::eMIPSAse_dsp)
146 if (arch_flags & ArchSpec::eMIPSAse_dspr2)
147 features +=
"+dspr2,";
149 m_reg_info.reset(target->createMCRegInfo(triple.getTriple()));
155 llvm::MCTargetOptions MCOptions;
157 target->createMCAsmInfo(*
m_reg_info, triple.getTriple(), MCOptions));
159 target->createMCSubtargetInfo(triple.getTriple(), cpu, features));
162 m_context = std::make_unique<llvm::MCContext>(
170 if (arch_flags & ArchSpec::eMIPSAse_mips16)
171 features +=
"+mips16,";
172 else if (arch_flags & ArchSpec::eMIPSAse_micromips)
173 features +=
"+micromips,";
176 target->createMCSubtargetInfo(triple.getTriple(), cpu, features));
197 return "Emulate instructions for the MIPS32 architecture.";
205 if (arch.
GetTriple().getArch() == llvm::Triple::mips ||
206 arch.
GetTriple().getArch() == llvm::Triple::mipsel) {
215 return arch.
GetTriple().getArch() == llvm::Triple::mips ||
216 arch.
GetTriple().getArch() == llvm::Triple::mipsel;
220 bool alternate_name) {
221 if (alternate_name) {
590 RegisterInfo ®_info) {
619 ::memset(®_info, 0,
sizeof(RegisterInfo));
625 reg_info.byte_size = 4;
630 reg_info.byte_size = 4;
635 reg_info.byte_size = 16;
675 "ADDIU rt, rs, immediate"},
686 "ADDIUS5 rd,immediate"},
689 "SWM16 reglist,offset(sp)"},
691 "SWM32 reglist,offset(base)"},
693 "SWP rs1,offset(base)"},
696 "LWM16 reglist,offset(sp)"},
698 "LWM32 reglist,offset(base)"},
700 "LWP rd,offset(base)"},
702 "JRADDIUSP immediate"},
713 "LB rt, offset(base)"},
715 "LBE rt, offset(base)"},
717 "LBU rt, offset(base)"},
719 "LBUE rt, offset(base)"},
721 "LDC1 ft, offset(base)"},
723 "LD rt, offset(base)"},
725 "LDL rt, offset(base)"},
727 "LDR rt, offset(base)"},
729 "LLD rt, offset(base)"},
731 "LDC2 rt, offset(base)"},
733 "LDXC1 fd, index (base)"},
735 "LH rt, offset(base)"},
737 "LHE rt, offset(base)"},
739 "LHU rt, offset(base)"},
741 "LHUE rt, offset(base)"},
743 "LL rt, offset(base)"},
745 "LLE rt, offset(base)"},
747 "LUXC1 fd, index (base)"},
749 "LW rt, offset(base)"},
751 "LWC1 ft, offset(base)"},
753 "LWC2 rt, offset(base)"},
755 "LWE rt, offset(base)"},
757 "LWL rt, offset(base)"},
759 "LWLE rt, offset(base)"},
761 "LWR rt, offset(base)"},
763 "LWRE rt, offset(base)"},
765 "LWXC1 fd, index (base)"},
767 "LLX rt, offset(base)"},
769 "LLXE rt, offset(base)"},
771 "LLDX rt, offset(base)"},
774 "SB rt, offset(base)"},
776 "SBE rt, offset(base)"},
778 "SC rt, offset(base)"},
780 "SCE rt, offset(base)"},
782 "SCD rt, offset(base)"},
784 "SD rt, offset(base)"},
786 "SDL rt, offset(base)"},
788 "SDR rt, offset(base)"},
790 "SDC1 ft, offset(base)"},
792 "SDC2 rt, offset(base)"},
794 "SDXC1 fs, index(base)"},
796 "SH rt, offset(base)"},
798 "SHE rt, offset(base)"},
800 "SUXC1 fs, index (base)"},
802 "SWC1 ft, offset(base)"},
804 "SWC2 rt, offset(base)"},
806 "SWE rt, offset(base)"},
808 "SWL rt, offset(base)"},
810 "SWLE rt, offset(base)"},
812 "SWR rt, offset(base)"},
814 "SWRE rt, offset(base)"},
816 "SWXC1 fs, index (base)"},
818 "SCX rt, offset(base)"},
820 "SCXE rt, offset(base)"},
822 "SCDX rt, offset(base)"},
826 "LBU16 rt, decoded_offset(base)"},
828 "LHU16 rt, left_shifted_offset(base)"},
830 "LW16 rt, left_shifted_offset(base)"},
832 "LWGP rt, left_shifted_offset(gp)"},
834 "SH16 rt, left_shifted_offset(base)"},
836 "SW16 rt, left_shifted_offset(base)"},
838 "SWSP rt, left_shifted_offset(base)"},
840 "SB16 rt, offset(base)"},
848 "BGEZALL rt,offset"},
856 "BLEZALC rs,offset"},
858 "BGEZALC rs,offset"},
860 "BLTZALC rs,offset"},
862 "BGTZALC rs,offset"},
864 "BEQZALC rs,offset"},
866 "BNEZALC rs,offset"},
868 "BEQC rs,rt,offset"},
870 "BNEC rs,rt,offset"},
872 "BLTC rs,rt,offset"},
874 "BGEC rs,rt,offset"},
876 "BLTUC rs,rt,offset"},
878 "BGEUC rs,rt,offset"},
894 "BLTZALL rt,offset"},
897 "BOVC rs,rt,offset"},
899 "BNVC rs,rt,offset"},
916 "BC1ANY2F cc, offset"},
918 "BC1ANY2T cc, offset"},
920 "BC1ANY4F cc, offset"},
922 "BC1ANY4T cc, offset"},
937 "BEQZ16 rs, offset"},
939 "BNEZ16 rs, offset"},
945 "BGEZALS rs, offset"},
947 "BLTZALS rs, offset"},
958 if (name.equals_insensitive(opcode.op_name))
966 uint64_t inst_addr) {
967 uint64_t next_inst_size = 0;
968 llvm::MCInst mc_insn;
969 llvm::MCDisassembler::DecodeStatus decode_status;
974 mc_insn, next_inst_size, raw_insn, inst_addr, llvm::nulls());
976 decode_status =
m_disasm->getInstruction(mc_insn, next_inst_size, raw_insn,
977 inst_addr, llvm::nulls());
979 if (decode_status != llvm::MCDisassembler::Success)
982 return m_insn_info->get(mc_insn.getOpcode()).getSize();
990 if (EmulateInstruction::SetInstruction(insn_opcode, inst_addr, target)) {
1003 uint64_t next_inst_addr = (
m_addr & (~1ull)) + current_inst_size;
1004 Address next_addr(next_inst_addr);
1006 const size_t bytes_read =
1012 if (bytes_read == 0)
1033 bool success =
false;
1050 bool success =
false;
1051 llvm::MCInst mc_insn;
1058 llvm::MCDisassembler::DecodeStatus decode_status;
1061 decode_status =
m_alt_disasm->getInstruction(mc_insn, insn_size, raw_insn,
1064 decode_status =
m_disasm->getInstruction(mc_insn, insn_size, raw_insn,
1067 if (decode_status != llvm::MCDisassembler::Success)
1075 const char *op_name =
m_insn_info->getName(mc_insn.getOpcode()).data();
1077 if (op_name ==
nullptr)
1086 if (opcode_data ==
nullptr)
1089 uint64_t old_pc = 0, new_pc = 0;
1090 const bool auto_advance_pc =
1091 evaluate_options & eEmulateInstructionOptionAutoAdvancePC;
1093 if (auto_advance_pc) {
1101 success = (this->*opcode_data->
callback)(mc_insn);
1105 if (auto_advance_pc) {
1112 if (old_pc == new_pc) {
1126 unwind_plan.
Clear();
1130 const bool can_replace =
false;
1133 row->GetCFAValue().SetIsRegisterPlusOffset(
dwarf_sp_mips, 0);
1176 bool success =
false;
1177 const uint32_t imm16 = insn.getOperand(2).getImm();
1180 dst =
m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
1181 src =
m_reg_info->getEncodingValue(insn.getOperand(1).getReg());
1198 uint64_t result = src_opd_val + imm;
1199 RegisterInfo reg_info_sp;
1224 bool success =
false;
1225 uint32_t imm16 = insn.getOperand(2).getImm();
1231 RegisterInfo reg_info_base;
1233 src =
m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
1234 base =
m_reg_info->getEncodingValue(insn.getOperand(1).getReg());
1247 address = address + imm;
1257 RegisterInfo reg_info_src;
1268 uint8_t buffer[RegisterValue::kMaxRegisterByteSize];
1274 if (data_src.
GetAsMemoryData(®_info_src, buffer, reg_info_src.byte_size,
1278 if (!
WriteMemory(context, address, buffer, reg_info_src.byte_size))
1288 bool success =
false;
1290 int32_t imm, address;
1293 src =
m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
1294 base =
m_reg_info->getEncodingValue(insn.getOperand(1).getReg());
1295 imm = insn.getOperand(2).getImm();
1297 RegisterInfo reg_info_base;
1309 address = address + imm;
1318 RegisterInfo reg_info_src;
1339 bool success =
false;
1341 uint8_t src, dst, rt;
1342 llvm::StringRef op_name =
m_insn_info->getName(insn.getOpcode());
1344 dst =
m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
1345 src =
m_reg_info->getEncodingValue(insn.getOperand(1).getReg());
1349 rt =
m_reg_info->getEncodingValue(insn.getOperand(2).getReg());
1363 if (op_name.equals_insensitive(
"SUBU"))
1364 result = src_opd_val - rt_opd_val;
1366 result = src_opd_val + rt_opd_val;
1369 RegisterInfo reg_info_sp;
1380 rt =
m_reg_info->getEncodingValue(insn.getOperand(2).getReg());
1396 if (op_name.equals_insensitive(
"SUBU"))
1397 result = src_opd_val - rt_opd_val;
1399 result = src_opd_val + rt_opd_val;
1416 const uint32_t imm32 = insn.getOperand(1).getImm() << 16;
1421 rt =
m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
1430 bool success =
false;
1431 const uint32_t imm9 = insn.getOperand(0).getImm();
1436 uint64_t src_opd_val =
1441 result = src_opd_val + imm9;
1444 RegisterInfo reg_info_sp;
1456 bool success =
false;
1458 const uint32_t imm4 = insn.getOperand(2).getImm();
1462 base =
m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
1472 result = src_opd_val + imm4;
1475 RegisterInfo reg_info_sp;
1489 bool success =
false;
1490 uint32_t imm5 = insn.getOperand(2).getImm();
1495 src =
m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
1496 base =
m_reg_info->getEncodingValue(insn.getOperand(1).getReg());
1498 RegisterInfo reg_info_base;
1511 address = address + imm5;
1522 RegisterInfo reg_info_src = {};
1528 uint8_t buffer[RegisterValue::kMaxRegisterByteSize];
1534 if (data_src.
GetAsMemoryData(®_info_src, buffer, reg_info_src.byte_size,
1538 if (!
WriteMemory(context, address, buffer, reg_info_src.byte_size))
1554 bool success =
false;
1556 uint32_t num_operands = insn.getNumOperands();
1561 m_reg_info->getEncodingValue(insn.getOperand(num_operands - 2).getReg());
1569 uint32_t offset = insn.getOperand(num_operands - 1).getImm();
1571 RegisterInfo reg_info_base;
1572 RegisterInfo reg_info_src;
1585 base_address = base_address + offset;
1588 for (
uint32_t i = 0; i < num_operands - 2; i++) {
1590 src =
m_reg_info->getEncodingValue(insn.getOperand(i).getReg());
1611 uint8_t buffer[RegisterValue::kMaxRegisterByteSize];
1617 if (data_src.
GetAsMemoryData(®_info_src, buffer, reg_info_src.byte_size,
1621 if (!
WriteMemory(context, base_address, buffer, reg_info_src.byte_size))
1625 base_address = base_address + reg_info_src.byte_size;
1631 bool success =
false;
1634 uint32_t imm5 = insn.getOperand(2).getImm();
1637 RegisterInfo reg_info_base;
1648 base_address = base_address + imm5;
1659 RegisterInfo reg_info_src;
1682 bool success =
false;
1684 uint32_t num_operands = insn.getNumOperands();
1686 uint32_t imm = insn.getOperand(num_operands - 1)
1691 m_reg_info->getEncodingValue(insn.getOperand(num_operands - 2).getReg());
1703 base_address = base_address + imm;
1706 RegisterInfo reg_info_dst;
1709 for (
uint32_t i = 0; i < num_operands - 2; i++) {
1711 dst =
m_reg_info->getEncodingValue(insn.getOperand(i).getReg());
1739 bool success =
false;
1740 int32_t imm5 = insn.getOperand(0).getImm();
1749 int32_t src_opd_val =
1759 int32_t result = src_opd_val + imm5;
1768 RegisterInfo reg_info_sp;
1782 return (a < 0 && b < 0 && r >= 0) || (a >= 0 && b >= 0 && r < 0);
1791 bool success =
false;
1793 int32_t offset,
pc, target = 0, rs_val, rt_val;
1794 llvm::StringRef op_name =
m_insn_info->getName(insn.getOpcode());
1796 rs =
m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
1797 rt =
m_reg_info->getEncodingValue(insn.getOperand(1).getReg());
1798 offset = insn.getOperand(2).getImm();
1814 if (op_name.equals_insensitive(
"BEQ") || op_name.equals_insensitive(
"BEQL")) {
1815 if (rs_val == rt_val)
1816 target =
pc + offset;
1819 }
else if (op_name.equals_insensitive(
"BNE") ||
1820 op_name.equals_insensitive(
"BNEL")) {
1821 if (rs_val != rt_val)
1822 target =
pc + offset;
1841 bool success =
false;
1843 int32_t offset,
pc, target = 0, rs_val, rt_val;
1844 llvm::StringRef op_name =
m_insn_info->getName(insn.getOpcode());
1847 rs =
m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
1848 rt =
m_reg_info->getEncodingValue(insn.getOperand(1).getReg());
1849 offset = insn.getOperand(2).getImm();
1865 if (op_name.equals_insensitive(
"BEQC")) {
1866 if (rs_val == rt_val)
1867 target =
pc + offset;
1870 }
else if (op_name.equals_insensitive(
"BNEC")) {
1871 if (rs_val != rt_val)
1872 target =
pc + offset;
1875 }
else if (op_name.equals_insensitive(
"BLTC")) {
1876 if (rs_val < rt_val)
1877 target =
pc + offset;
1880 }
else if (op_name.equals_insensitive(
"BGEC")) {
1881 if (rs_val >= rt_val)
1882 target =
pc + offset;
1885 }
else if (op_name.equals_insensitive(
"BLTUC")) {
1886 if (rs_val < rt_val)
1887 target =
pc + offset;
1890 }
else if (op_name.equals_insensitive(
"BGEUC")) {
1892 target =
pc + offset;
1895 }
else if (op_name.equals_insensitive(
"BOVC")) {
1897 target =
pc + offset;
1900 }
else if (op_name.equals_insensitive(
"BNVC")) {
1902 target =
pc + offset;
1920 bool success =
false;
1922 int32_t offset,
pc, target = 0;
1924 llvm::StringRef op_name =
m_insn_info->getName(insn.getOpcode());
1926 rs =
m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
1927 offset = insn.getOperand(1).getImm();
1938 if (op_name.equals_insensitive(
"BLEZALC")) {
1940 target =
pc + offset;
1943 }
else if (op_name.equals_insensitive(
"BGEZALC")) {
1945 target =
pc + offset;
1948 }
else if (op_name.equals_insensitive(
"BLTZALC")) {
1950 target =
pc + offset;
1953 }
else if (op_name.equals_insensitive(
"BGTZALC")) {
1955 target =
pc + offset;
1958 }
else if (op_name.equals_insensitive(
"BEQZALC")) {
1960 target =
pc + offset;
1963 }
else if (op_name.equals_insensitive(
"BNEZALC")) {
1965 target =
pc + offset;
1989 bool success =
false;
1991 int32_t offset,
pc, target = 0;
1993 llvm::StringRef op_name =
m_insn_info->getName(insn.getOpcode());
1995 rs =
m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
1996 offset = insn.getOperand(1).getImm();
2007 if (op_name.equals_insensitive(
"BLTZAL") ||
2008 op_name.equals_insensitive(
"BLTZALL")) {
2009 if ((int32_t)rs_val < 0)
2010 target =
pc + offset;
2013 }
else if (op_name.equals_insensitive(
"BGEZAL") ||
2014 op_name.equals_insensitive(
"BGEZALL")) {
2015 if ((int32_t)rs_val >= 0)
2016 target =
pc + offset;
2040 bool success =
false;
2042 int32_t offset,
pc, target = 0;
2044 llvm::StringRef op_name =
m_insn_info->getName(insn.getOpcode());
2046 rs =
m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
2047 offset = insn.getOperand(1).getImm();
2058 if (op_name.equals_insensitive(
"BLTZL") ||
2059 op_name.equals_insensitive(
"BLTZ")) {
2061 target =
pc + offset;
2064 }
else if (op_name.equals_insensitive(
"BGEZL") ||
2065 op_name.equals_insensitive(
"BGEZ")) {
2067 target =
pc + offset;
2070 }
else if (op_name.equals_insensitive(
"BGTZL") ||
2071 op_name.equals_insensitive(
"BGTZ")) {
2073 target =
pc + offset;
2076 }
else if (op_name.equals_insensitive(
"BLEZL") ||
2077 op_name.equals_insensitive(
"BLEZ")) {
2079 target =
pc + offset;
2097 bool success =
false;
2099 int32_t offset,
pc, target = 0;
2101 llvm::StringRef op_name =
m_insn_info->getName(insn.getOpcode());
2104 rs =
m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
2105 offset = insn.getOperand(1).getImm();
2116 if (op_name.equals_insensitive(
"BLTZC")) {
2118 target =
pc + offset;
2121 }
else if (op_name.equals_insensitive(
"BLEZC")) {
2123 target =
pc + offset;
2126 }
else if (op_name.equals_insensitive(
"BGEZC")) {
2128 target =
pc + offset;
2131 }
else if (op_name.equals_insensitive(
"BGTZC")) {
2133 target =
pc + offset;
2136 }
else if (op_name.equals_insensitive(
"BEQZC")) {
2138 target =
pc + offset;
2141 }
else if (op_name.equals_insensitive(
"BNEZC")) {
2143 target =
pc + offset;
2157 bool success =
false;
2158 int32_t offset,
pc, target;
2161 offset = insn.getOperand(0).getImm();
2168 target =
pc + offset;
2184 bool success =
false;
2187 llvm::StringRef op_name =
m_insn_info->getName(insn.getOpcode());
2188 bool update_ra =
false;
2209 int32_t offset = insn.getOperand(1).getImm();
2221 if (op_name.equals_insensitive(
"BEQZ16_MM")) {
2223 target =
pc + offset;
2225 target =
pc + current_inst_size +
2227 }
else if (op_name.equals_insensitive(
"BNEZ16_MM")) {
2229 target =
pc + offset;
2231 target =
pc + current_inst_size +
2233 }
else if (op_name.equals_insensitive(
"BEQZC_MM")) {
2235 target =
pc + 4 + offset;
2240 }
else if (op_name.equals_insensitive(
"BNEZC_MM")) {
2242 target =
pc + 4 + offset;
2247 }
else if (op_name.equals_insensitive(
"BGEZALS_MM")) {
2249 target =
pc + offset;
2255 }
else if (op_name.equals_insensitive(
"BLTZALS_MM")) {
2257 target =
pc + offset;
2285 bool success =
false;
2287 llvm::StringRef op_name =
m_insn_info->getName(insn.getOpcode());
2301 if (op_name.equals_insensitive(
"JALR16_MM"))
2303 else if (op_name.equals_insensitive(
"JALRS16_MM"))
2324 bool success =
false;
2325 uint32_t offset = 0, target = 0,
pc = 0, ra_offset = 0;
2326 llvm::StringRef op_name =
m_insn_info->getName(insn.getOpcode());
2338 offset = insn.getOperand(0).getImm();
2345 if (op_name.equals_insensitive(
"JALS_MM")) {
2347 target = (
pc & 0xF8000000UL) | offset;
2349 }
else if (op_name.equals_insensitive(
"JALX_MM")) {
2351 target = (
pc & 0xF0000000UL) | offset;
2369 bool success =
false;
2371 int32_t
pc = 0, rs_val = 0;
2379 rt =
m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
2380 rs =
m_reg_info->getEncodingValue(insn.getOperand(1).getReg());
2406 bool success =
false;
2407 int32_t offset,
pc, target;
2415 offset = insn.getOperand(0).getImm();
2421 target =
pc + offset;
2437 bool success =
false;
2438 int32_t offset,
pc, target;
2446 offset = insn.getOperand(0).getImm();
2452 target =
pc + offset;
2468 bool success =
false;
2469 int32_t offset,
pc, target;
2476 offset = insn.getOperand(0).getImm();
2482 target =
pc + offset;
2491 bool success =
false;
2499 offset = insn.getOperand(0).getImm();
2506 pc = (
pc & 0xF0000000UL) | offset;
2514 bool success =
false;
2522 offset = insn.getOperand(0).getImm();
2529 target = (
pc & 0xF0000000UL) | offset;
2545 bool success =
false;
2554 rt =
m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
2555 rs =
m_reg_info->getEncodingValue(insn.getOperand(1).getReg());
2580 bool success =
false;
2582 int32_t target, offset,
pc, rt_val;
2590 rt =
m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
2591 offset = insn.getOperand(1).getImm();
2602 target = rt_val + offset;
2618 bool success =
false;
2620 int32_t target, offset, rt_val;
2627 rt =
m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
2628 offset = insn.getOperand(1).getImm();
2635 target = rt_val + offset;
2644 bool success =
false;
2652 rs =
m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
2671 bool success =
false;
2673 int32_t
pc, offset, target = 0;
2674 llvm::StringRef op_name =
m_insn_info->getName(insn.getOpcode());
2676 cc =
m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
2677 offset = insn.getOperand(1).getImm();
2688 fcsr = ((fcsr >> 24) & 0xfe) | ((fcsr >> 23) & 0x01);
2690 if (op_name.equals_insensitive(
"BC1F") ||
2691 op_name.equals_insensitive(
"BC1FL")) {
2692 if ((fcsr & (1 << cc)) == 0)
2693 target =
pc + offset;
2696 }
else if (op_name.equals_insensitive(
"BC1T") ||
2697 op_name.equals_insensitive(
"BC1TL")) {
2698 if ((fcsr & (1 << cc)) != 0)
2699 target =
pc + offset;
2710 bool success =
false;
2713 int32_t target,
pc, offset;
2722 ft =
m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
2723 offset = insn.getOperand(1).getImm();
2734 if ((ft_val & 1) == 0)
2735 target =
pc + 4 + offset;
2746 bool success =
false;
2749 int32_t target,
pc, offset;
2758 ft =
m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
2759 offset = insn.getOperand(1).getImm();
2770 if ((ft_val & 1) != 0)
2771 target =
pc + 4 + offset;
2789 bool success =
false;
2791 int32_t
pc, offset, target = 0;
2792 llvm::StringRef op_name =
m_insn_info->getName(insn.getOpcode());
2794 cc =
m_reg_info->getEncodingValue(insn.getOperand(0).getReg());
2795 offset = insn.getOperand(1).getImm();
2807 fcsr = ((fcsr >> 24) & 0xfe) | ((fcsr >> 23) & 0x01);
2809 if (op_name.equals_insensitive(
"BC1ANY2F")) {
2811 if (((fcsr >> cc) & 3) != 3)
2812 target =
pc + offset;
2815 }
else if (op_name.equals_insensitive(
"BC1ANY2T")) {
2817 if (((fcsr >> cc) & 3) != 0)
2818 target =
pc + offset;
2821 }
else if (op_name.equals_insensitive(
"BC1ANY4F")) {
2823 if (((fcsr >> cc) & 0xf) != 0xf)
2824 target =
pc + offset;
2827 }
else if (op_name.equals_insensitive(
"BC1ANY4T")) {
2829 if (((fcsr >> cc) & 0xf) != 0)
2830 target =
pc + offset;
2873 int element_byte_size,
2875 bool success =
false, branch_hit =
true;
2878 const uint8_t *ptr =
nullptr;
2881 int32_t offset = insn.getOperand(1).getImm();
2889 ptr = (
const uint8_t *)reg_value.
GetBytes();
2893 for (
int i = 0; i < 16 / element_byte_size; i++) {
2894 switch (element_byte_size) {
2896 if ((*ptr == 0 && bnz) || (*ptr != 0 && !bnz))
2900 if ((*(
const uint16_t *)ptr == 0 && bnz) ||
2901 (*(
const uint16_t *)ptr != 0 && !bnz))
2905 if ((*(
const uint32_t *)ptr == 0 && bnz) ||
2906 (*(
const uint32_t *)ptr != 0 && !bnz))
2910 if ((*(
const uint64_t *)ptr == 0 && bnz) ||
2911 (*(
const uint64_t *)ptr != 0 && !bnz))
2917 ptr = ptr + element_byte_size;
2921 target =
pc + offset;
2942 bool success =
false;
2944 llvm::APInt wr_val = llvm::APInt::getZero(128);
2945 llvm::APInt fail_value = llvm::APInt::getMaxValue(128);
2946 llvm::APInt zero_value = llvm::APInt::getZero(128);
2950 int32_t offset = insn.getOperand(1).getImm();
2962 if ((llvm::APInt::isSameValue(zero_value, wr_val) && !bnz) ||
2963 (!llvm::APInt::isSameValue(zero_value, wr_val) && bnz))
2964 target =
pc + offset;
2976 bool success =
false;
2978 int32_t imm, address;
2981 uint32_t num_operands = insn.getNumOperands();
2983 m_reg_info->getEncodingValue(insn.getOperand(num_operands - 2).getReg());
2984 imm = insn.getOperand(num_operands - 1).getImm();
2986 RegisterInfo reg_info_base;
2998 address = address + imm;
3009 bool success =
false;
3011 int32_t address, index_address;
3014 uint32_t num_operands = insn.getNumOperands();
3016 m_reg_info->getEncodingValue(insn.getOperand(num_operands - 2).getReg());
3018 m_reg_info->getEncodingValue(insn.getOperand(num_operands - 1).getReg());
3020 RegisterInfo reg_info_base, reg_info_index;
3042 address = address + index_address;