12#include "llvm/Support/Compiler.h"
17#define GPR_OFFSET(idx) ((idx)*8 + 0)
18#define FPR_OFFSET(idx) ((idx)*8 + sizeof(RegisterInfoPOSIX_riscv64::GPR))
20#define DECLARE_REGISTER_INFOS_RISCV64_STRUCT
22#undef DECLARE_REGISTER_INFOS_RISCV64_STRUCT
46 "g_gpr_regnums_riscv64 has wrong number of register infos");
60 case llvm::Triple::riscv64: {
65 if (m_opt_regsets.AnySet(eRegsetMaskFP))
71 assert(
false &&
"Unhandled target architecture.");
78 sizeof(g_register_infos_riscv64_gpr));
97 sizeof(g_register_infos_riscv64_fpr));
131 uint32_t reg_index)
const {
133 if (reg_index >= regset_range.second.first &&
134 reg_index < regset_range.second.second)
135 return regset_range.first;
const size_t k_num_gpr_registers
const size_t k_num_fpr_registers
@ k_num_register_sets_default
static const lldb_private::RegisterSet g_reg_set_fpr_riscv64
static const uint32_t g_gpr_regnums_riscv64[]
static const lldb_private::RegisterSet g_reg_set_gpr_riscv64
size_t GetRegisterSetCount() const override
size_t GetFPRSize() const override
bool IsFPReg(unsigned reg) const
size_t GetGPRSize() const override
std::map< uint32_t, std::pair< uint32_t, uint32_t > > m_per_regset_regnum_range
std::vector< lldb_private::RegisterInfo > m_register_infos
size_t GetRegisterSetFromRegisterIndex(uint32_t reg_index) const override
std::vector< lldb_private::RegisterSet > m_register_sets
uint32_t GetRegisterCount() const override
RegisterInfoPOSIX_riscv64(const lldb_private::ArchSpec &target_arch, lldb_private::Flags opt_regsets)
const lldb_private::RegisterSet * GetRegisterSet(size_t reg_set) const override
lldb_private::Flags m_opt_regsets
std::vector< uint32_t > m_fp_regnum_collection
const lldb_private::RegisterInfo * GetRegisterInfo() const override
An architecture specification class.
llvm::Triple::ArchType GetMachine() const
Returns a machine family for the current architecture.
RegisterInfoAndSetInterface(const lldb_private::ArchSpec &target_arch)
#define LLDB_INVALID_REGNUM
A class that represents a running process on the host machine.
Every register is described in detail including its name, alternate name (optional),...
Registers are grouped into register sets.