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RegisterInfoPOSIX_riscv64.cpp
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1//===-- RegisterInfoPOSIX_riscv64.cpp -------------------------------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===---------------------------------------------------------------------===//
8
9#include <cassert>
10#include <lldb/Utility/Flags.h>
11#include <stddef.h>
12
13#include "lldb/lldb-defines.h"
14#include "llvm/Support/Compiler.h"
15
17
18#define GPR_OFFSET(idx) ((idx)*8 + 0)
19#define FPR_OFFSET(idx) ((idx)*8 + sizeof(RegisterInfoPOSIX_riscv64::GPR))
20
21#define REG_CONTEXT_SIZE \
22 (sizeof(RegisterInfoPOSIX_riscv64::GPR) + \
23 sizeof(RegisterInfoPOSIX_riscv64::FPR))
24
25#define DECLARE_REGISTER_INFOS_RISCV64_STRUCT
27#undef DECLARE_REGISTER_INFOS_RISCV64_STRUCT
28
30 const lldb_private::ArchSpec &target_arch) {
31 switch (target_arch.GetMachine()) {
32 case llvm::Triple::riscv64:
33 return g_register_infos_riscv64_le;
34 default:
35 assert(false && "Unhandled target architecture.");
36 return nullptr;
37 }
38}
39
41 const lldb_private::ArchSpec &target_arch) {
42 switch (target_arch.GetMachine()) {
43 case llvm::Triple::riscv64:
44 return static_cast<uint32_t>(sizeof(g_register_infos_riscv64_le) /
45 sizeof(g_register_infos_riscv64_le[0]));
46 default:
47 assert(false && "Unhandled target architecture.");
48 return 0;
49 }
50}
51
52// Number of register sets provided by this context.
53enum {
57};
58
59// RISC-V64 general purpose registers.
60static const uint32_t g_gpr_regnums_riscv64[] = {
70
71static_assert(((sizeof g_gpr_regnums_riscv64 /
72 sizeof g_gpr_regnums_riscv64[0]) -
74 "g_gpr_regnums_riscv64 has wrong number of register infos");
75
76// RISC-V64 floating point registers.
77static const uint32_t g_fpr_regnums_riscv64[] = {
87
88static_assert(((sizeof g_fpr_regnums_riscv64 /
89 sizeof g_fpr_regnums_riscv64[0]) -
91 "g_fpr_regnums_riscv64 has wrong number of register infos");
92
93// Register sets for RISC-V64.
95 {{"General Purpose Registers", "gpr", k_num_gpr_registers,
97 {"Floating Point Registers", "fpr", k_num_fpr_registers,
99
101 const lldb_private::ArchSpec &target_arch, lldb_private::Flags flags)
102 : lldb_private::RegisterInfoAndSetInterface(target_arch),
103 m_register_info_p(GetRegisterInfoPtr(target_arch)),
104 m_register_info_count(GetRegisterInfoCount(target_arch)) {}
105
108}
109
111 return sizeof(struct RegisterInfoPOSIX_riscv64::GPR);
112}
113
115 return sizeof(struct RegisterInfoPOSIX_riscv64::FPR);
116}
117
120 return m_register_info_p;
121}
122
124 return k_num_register_sets;
125}
126
128 uint32_t reg_index) const {
129 // coverity[unsigned_compare]
130 if (reg_index >= gpr_first_riscv && reg_index <= gpr_last_riscv)
131 return GPRegSet;
132 if (reg_index >= fpr_first_riscv && reg_index <= fpr_last_riscv)
133 return FPRegSet;
134 return LLDB_INVALID_REGNUM;
135}
136
139 if (set_index < GetRegisterSetCount())
140 return &g_reg_sets_riscv64[set_index];
141 return nullptr;
142}
constexpr size_t k_num_register_sets
static const RegisterInfo * GetRegisterInfoPtr(const ArchSpec &target_arch)
static uint32_t GetRegisterInfoCount(const ArchSpec &target_arch)
static const uint32_t g_fpr_regnums_riscv64[]
static const uint32_t g_gpr_regnums_riscv64[]
static const lldb_private::RegisterSet g_reg_sets_riscv64[k_num_register_sets]
size_t GetRegisterSetCount() const override
RegisterInfoPOSIX_riscv64(const lldb_private::ArchSpec &target_arch, lldb_private::Flags flags)
const lldb_private::RegisterInfo * m_register_info_p
size_t GetRegisterSetFromRegisterIndex(uint32_t reg_index) const override
static const lldb_private::RegisterInfo * GetRegisterInfoPtr(const lldb_private::ArchSpec &target_arch)
uint32_t GetRegisterCount() const override
const lldb_private::RegisterSet * GetRegisterSet(size_t reg_set) const override
static uint32_t GetRegisterInfoCount(const lldb_private::ArchSpec &target_arch)
const lldb_private::RegisterInfo * GetRegisterInfo() const override
An architecture specification class.
Definition: ArchSpec.h:31
llvm::Triple::ArchType GetMachine() const
Returns a machine family for the current architecture.
Definition: ArchSpec.cpp:683
A class to manage flags.
Definition: Flags.h:22
#define LLDB_INVALID_REGNUM
Definition: lldb-defines.h:87
A class that represents a running process on the host machine.
Every register is described in detail including its name, alternate name (optional),...
Registers are grouped into register sets.