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RegisterInfoPOSIX_riscv64.cpp
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1//===-- RegisterInfoPOSIX_riscv64.cpp -------------------------------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===---------------------------------------------------------------------===//
8
10#include "lldb/Utility/Flags.h"
11#include "lldb/lldb-defines.h"
12#include "llvm/Support/Compiler.h"
13
14#include <cassert>
15#include <stddef.h>
16
17#define GPR_OFFSET(idx) ((idx)*8 + 0)
18#define FPR_OFFSET(idx) ((idx)*8 + sizeof(RegisterInfoPOSIX_riscv64::GPR))
19
20#define DECLARE_REGISTER_INFOS_RISCV64_STRUCT
22#undef DECLARE_REGISTER_INFOS_RISCV64_STRUCT
23
24// Number of register sets provided by this context.
25enum {
29};
30
31// RISC-V64 general purpose registers.
42
43static_assert(((sizeof g_gpr_regnums_riscv64 /
44 sizeof g_gpr_regnums_riscv64[0]) -
46 "g_gpr_regnums_riscv64 has wrong number of register infos");
47
48// Register sets for RISC-V64.
50 "General Purpose Registers", "gpr", k_num_gpr_registers,
53 "Floating Point Registers", "fpr", k_num_fpr_registers, nullptr};
54
56 const lldb_private::ArchSpec &target_arch, lldb_private::Flags opt_regsets)
58 m_opt_regsets(opt_regsets) {
59 switch (target_arch.GetMachine()) {
60 case llvm::Triple::riscv64: {
61 // By-default considering RISC-V has only GPR.
62 // Other register sets could be enabled optionally by opt_regsets.
63 AddRegSetGP();
64
65 if (m_opt_regsets.AnySet(eRegsetMaskFP))
66 AddRegSetFP();
67
68 break;
69 }
70 default:
71 assert(false && "Unhandled target architecture.");
72 }
73}
74
77 memcpy(&m_register_infos[0], g_register_infos_riscv64_gpr,
78 sizeof(g_register_infos_riscv64_gpr));
80
82 std::make_pair(gpr_first_riscv, m_register_infos.size());
83}
84
86 const uint32_t register_info_count = m_register_infos.size();
87 const uint32_t register_set_count = m_register_sets.size();
88
89 // Filling m_register_infos.
90 // For FPR case we do not need to correct register offsets and kinds
91 // while for other further cases (like VPR), register offset/kind
92 // should be started counting from the last one in previously added
93 // regset. This is needed for the case e.g. when architecture has GPR + VPR
94 // sets only.
95 m_register_infos.resize(register_info_count + k_num_fpr_registers);
96 memcpy(&m_register_infos[register_info_count], g_register_infos_riscv64_fpr,
97 sizeof(g_register_infos_riscv64_fpr));
98
99 // Filling m_register_sets with enabled register set
100 for (uint32_t i = 0; i < k_num_fpr_registers; i++)
101 m_fp_regnum_collection.push_back(register_info_count + i);
103 m_register_sets.back().registers = m_fp_regnum_collection.data();
104
105 m_per_regset_regnum_range[register_set_count] =
106 std::make_pair(register_info_count, m_register_infos.size());
107}
108
110 return m_register_infos.size();
111}
112
114 return sizeof(struct RegisterInfoPOSIX_riscv64::GPR);
115}
116
118 return sizeof(struct RegisterInfoPOSIX_riscv64::FPR);
119}
120
125
129
131 uint32_t reg_index) const {
132 for (const auto &regset_range : m_per_regset_regnum_range) {
133 if (reg_index >= regset_range.second.first &&
134 reg_index < regset_range.second.second)
135 return regset_range.first;
136 }
137 return LLDB_INVALID_REGNUM;
138}
139
140bool RegisterInfoPOSIX_riscv64::IsFPReg(unsigned reg) const {
141 return llvm::is_contained(m_fp_regnum_collection, reg);
142}
143
146 if (set_index < GetRegisterSetCount())
147 return &m_register_sets[set_index];
148 return nullptr;
149}
const size_t k_num_gpr_registers
const size_t k_num_fpr_registers
@ k_num_register_sets_default
static const lldb_private::RegisterSet g_reg_set_fpr_riscv64
static const uint32_t g_gpr_regnums_riscv64[]
static const lldb_private::RegisterSet g_reg_set_gpr_riscv64
size_t GetRegisterSetCount() const override
std::map< uint32_t, std::pair< uint32_t, uint32_t > > m_per_regset_regnum_range
std::vector< lldb_private::RegisterInfo > m_register_infos
size_t GetRegisterSetFromRegisterIndex(uint32_t reg_index) const override
std::vector< lldb_private::RegisterSet > m_register_sets
uint32_t GetRegisterCount() const override
RegisterInfoPOSIX_riscv64(const lldb_private::ArchSpec &target_arch, lldb_private::Flags opt_regsets)
const lldb_private::RegisterSet * GetRegisterSet(size_t reg_set) const override
std::vector< uint32_t > m_fp_regnum_collection
const lldb_private::RegisterInfo * GetRegisterInfo() const override
An architecture specification class.
Definition ArchSpec.h:31
llvm::Triple::ArchType GetMachine() const
Returns a machine family for the current architecture.
Definition ArchSpec.cpp:677
A class to manage flags.
Definition Flags.h:22
RegisterInfoAndSetInterface(const lldb_private::ArchSpec &target_arch)
#define LLDB_INVALID_REGNUM
A class that represents a running process on the host machine.
Every register is described in detail including its name, alternate name (optional),...
Registers are grouped into register sets.