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RegisterInfoPOSIX_riscv64.cpp
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1//===-- RegisterInfoPOSIX_riscv64.cpp -------------------------------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===---------------------------------------------------------------------===//
8
9#include <cassert>
10#include <lldb/Utility/Flags.h>
11#include <stddef.h>
12
13#include "lldb/lldb-defines.h"
14#include "llvm/Support/Compiler.h"
15
17
18#define GPR_OFFSET(idx) ((idx)*8 + 0)
19#define FPR_OFFSET(idx) ((idx)*8 + sizeof(RegisterInfoPOSIX_riscv64::GPR))
20
21#define DECLARE_REGISTER_INFOS_RISCV64_STRUCT
23#undef DECLARE_REGISTER_INFOS_RISCV64_STRUCT
24
25// Number of register sets provided by this context.
26enum {
30};
31
32// RISC-V64 general purpose registers.
33static const uint32_t g_gpr_regnums_riscv64[] = {
43
44static_assert(((sizeof g_gpr_regnums_riscv64 /
45 sizeof g_gpr_regnums_riscv64[0]) -
47 "g_gpr_regnums_riscv64 has wrong number of register infos");
48
49// Register sets for RISC-V64.
51 "General Purpose Registers", "gpr", k_num_gpr_registers,
54 "Floating Point Registers", "fpr", k_num_fpr_registers, nullptr};
55
57 const lldb_private::ArchSpec &target_arch, lldb_private::Flags opt_regsets)
58 : lldb_private::RegisterInfoAndSetInterface(target_arch),
59 m_opt_regsets(opt_regsets) {
60 switch (target_arch.GetMachine()) {
61 case llvm::Triple::riscv64: {
62 // By-default considering RISC-V has only GPR.
63 // Other register sets could be enabled optionally by opt_regsets.
65
68
69 break;
70 }
71 default:
72 assert(false && "Unhandled target architecture.");
73 }
74}
75
78 memcpy(&m_register_infos[0], g_register_infos_riscv64_gpr,
79 sizeof(g_register_infos_riscv64_gpr));
81
83 std::make_pair(gpr_first_riscv, m_register_infos.size());
84}
85
87 const uint32_t register_info_count = m_register_infos.size();
88 const uint32_t register_set_count = m_register_sets.size();
89
90 // Filling m_register_infos.
91 // For FPR case we do not need to correct register offsets and kinds
92 // while for other further cases (like VPR), register offset/kind
93 // should be started counting from the last one in previously added
94 // regset. This is needed for the case e.g. when architecture has GPR + VPR
95 // sets only.
96 m_register_infos.resize(register_info_count + k_num_fpr_registers);
97 memcpy(&m_register_infos[register_info_count], g_register_infos_riscv64_fpr,
98 sizeof(g_register_infos_riscv64_fpr));
99
100 // Filling m_register_sets with enabled register set
101 for (uint32_t i = 0; i < k_num_fpr_registers; i++)
102 m_fp_regnum_collection.push_back(register_info_count + i);
104 m_register_sets.back().registers = m_fp_regnum_collection.data();
105
106 m_per_regset_regnum_range[register_set_count] =
107 std::make_pair(register_info_count, m_register_infos.size());
108}
109
111 return m_register_infos.size();
112}
113
115 return sizeof(struct RegisterInfoPOSIX_riscv64::GPR);
116}
117
119 return sizeof(struct RegisterInfoPOSIX_riscv64::FPR);
120}
121
124 return m_register_infos.data();
125}
126
128 return m_register_sets.size();
129}
130
132 uint32_t reg_index) const {
133 for (const auto &regset_range : m_per_regset_regnum_range) {
134 if (reg_index >= regset_range.second.first &&
135 reg_index < regset_range.second.second)
136 return regset_range.first;
137 }
138 return LLDB_INVALID_REGNUM;
139}
140
141bool RegisterInfoPOSIX_riscv64::IsFPReg(unsigned reg) const {
142 return llvm::is_contained(m_fp_regnum_collection, reg);
143}
144
147 if (set_index < GetRegisterSetCount())
148 return &m_register_sets[set_index];
149 return nullptr;
150}
const size_t k_num_gpr_registers
@ k_num_fpr_registers
static const lldb_private::RegisterSet g_reg_set_fpr_riscv64
@ k_num_register_sets_default
static const uint32_t g_gpr_regnums_riscv64[]
static const lldb_private::RegisterSet g_reg_set_gpr_riscv64
size_t GetRegisterSetCount() const override
std::map< uint32_t, std::pair< uint32_t, uint32_t > > m_per_regset_regnum_range
std::vector< lldb_private::RegisterInfo > m_register_infos
size_t GetRegisterSetFromRegisterIndex(uint32_t reg_index) const override
std::vector< lldb_private::RegisterSet > m_register_sets
uint32_t GetRegisterCount() const override
RegisterInfoPOSIX_riscv64(const lldb_private::ArchSpec &target_arch, lldb_private::Flags opt_regsets)
const lldb_private::RegisterSet * GetRegisterSet(size_t reg_set) const override
std::vector< uint32_t > m_fp_regnum_collection
const lldb_private::RegisterInfo * GetRegisterInfo() const override
An architecture specification class.
Definition: ArchSpec.h:31
llvm::Triple::ArchType GetMachine() const
Returns a machine family for the current architecture.
Definition: ArchSpec.cpp:701
A class to manage flags.
Definition: Flags.h:22
bool AnySet(ValueType mask) const
Test one or more flags.
Definition: Flags.h:90
#define LLDB_INVALID_REGNUM
Definition: lldb-defines.h:87
A class that represents a running process on the host machine.
Every register is described in detail including its name, alternate name (optional),...
Registers are grouped into register sets.