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RegisterInfoPOSIX_riscv64.cpp
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1 //===-- RegisterInfoPOSIX_riscv64.cpp -------------------------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===---------------------------------------------------------------------===//
8 
9 #include <cassert>
10 #include <lldb/Utility/Flags.h>
11 #include <stddef.h>
12 
13 #include "lldb/lldb-defines.h"
14 #include "llvm/Support/Compiler.h"
15 
17 
18 #define GPR_OFFSET(idx) ((idx)*8 + 0)
19 #define FPR_OFFSET(idx) ((idx)*8 + sizeof(RegisterInfoPOSIX_riscv64::GPR))
20 
21 #define REG_CONTEXT_SIZE \
22  (sizeof(RegisterInfoPOSIX_riscv64::GPR) + \
23  sizeof(RegisterInfoPOSIX_riscv64::FPR))
24 
25 #define DECLARE_REGISTER_INFOS_RISCV64_STRUCT
26 #include "RegisterInfos_riscv64.h"
27 #undef DECLARE_REGISTER_INFOS_RISCV64_STRUCT
28 
29 const lldb_private::RegisterInfo *RegisterInfoPOSIX_riscv64::GetRegisterInfoPtr(
30  const lldb_private::ArchSpec &target_arch) {
31  switch (target_arch.GetMachine()) {
32  case llvm::Triple::riscv64:
33  return g_register_infos_riscv64_le;
34  default:
35  assert(false && "Unhandled target architecture.");
36  return nullptr;
37  }
38 }
39 
41  const lldb_private::ArchSpec &target_arch) {
42  switch (target_arch.GetMachine()) {
43  case llvm::Triple::riscv64:
44  return static_cast<uint32_t>(sizeof(g_register_infos_riscv64_le) /
45  sizeof(g_register_infos_riscv64_le[0]));
46  default:
47  assert(false && "Unhandled target architecture.");
48  return 0;
49  }
50 }
51 
52 // Number of register sets provided by this context.
53 enum {
57 };
58 
59 // RISC-V64 general purpose registers.
60 static const uint32_t g_gpr_regnums_riscv64[] = {
70 
71 static_assert(((sizeof g_gpr_regnums_riscv64 /
72  sizeof g_gpr_regnums_riscv64[0]) -
73  1) == k_num_gpr_registers,
74  "g_gpr_regnums_riscv64 has wrong number of register infos");
75 
76 // RISC-V64 floating point registers.
77 static const uint32_t g_fpr_regnums_riscv64[] = {
87 
88 static_assert(((sizeof g_fpr_regnums_riscv64 /
89  sizeof g_fpr_regnums_riscv64[0]) -
90  1) == k_num_fpr_registers,
91  "g_fpr_regnums_riscv64 has wrong number of register infos");
92 
93 // Register sets for RISC-V64.
94 static const lldb_private::RegisterSet g_reg_sets_riscv64[k_num_register_sets] =
95  {{"General Purpose Registers", "gpr", k_num_gpr_registers,
97  {"Floating Point Registers", "fpr", k_num_fpr_registers,
99 
101  const lldb_private::ArchSpec &target_arch, lldb_private::Flags flags)
102  : lldb_private::RegisterInfoAndSetInterface(target_arch),
103  m_register_info_p(GetRegisterInfoPtr(target_arch)),
104  m_register_info_count(GetRegisterInfoCount(target_arch)) {}
105 
107  return m_register_info_count;
108 }
109 
111  return sizeof(struct RegisterInfoPOSIX_riscv64::GPR);
112 }
113 
115  return sizeof(struct RegisterInfoPOSIX_riscv64::FPR);
116 }
117 
118 const lldb_private::RegisterInfo *
120  return m_register_info_p;
121 }
122 
124  return k_num_register_sets;
125 }
126 
128  uint32_t reg_index) const {
129  // coverity[unsigned_compare]
130  if (reg_index >= gpr_first_riscv && reg_index <= gpr_last_riscv)
131  return GPRegSet;
132  if (reg_index >= fpr_first_riscv && reg_index <= fpr_last_riscv)
133  return FPRegSet;
134  return LLDB_INVALID_REGNUM;
135 }
136 
137 const lldb_private::RegisterSet *
139  if (set_index < GetRegisterSetCount())
140  return &g_reg_sets_riscv64[set_index];
141  return nullptr;
142 }
gpr_x15_riscv
@ gpr_x15_riscv
Definition: lldb-riscv-register-enums.h:34
fpr_f23_riscv
@ fpr_f23_riscv
Definition: lldb-riscv-register-enums.h:110
fpr_f8_riscv
@ fpr_f8_riscv
Definition: lldb-riscv-register-enums.h:95
fpr_f26_riscv
@ fpr_f26_riscv
Definition: lldb-riscv-register-enums.h:113
fpr_f21_riscv
@ fpr_f21_riscv
Definition: lldb-riscv-register-enums.h:108
fpr_f30_riscv
@ fpr_f30_riscv
Definition: lldb-riscv-register-enums.h:117
lldb_private::ArchSpec
Definition: ArchSpec.h:32
gpr_x9_riscv
@ gpr_x9_riscv
Definition: lldb-riscv-register-enums.h:28
fpr_f22_riscv
@ fpr_f22_riscv
Definition: lldb-riscv-register-enums.h:109
LLDB_INVALID_REGNUM
#define LLDB_INVALID_REGNUM
Definition: lldb-defines.h:79
lldb_private::ArchSpec::GetMachine
llvm::Triple::ArchType GetMachine() const
Returns a machine family for the current architecture.
Definition: ArchSpec.cpp:678
gpr_x27_riscv
@ gpr_x27_riscv
Definition: lldb-riscv-register-enums.h:46
gpr_x10_riscv
@ gpr_x10_riscv
Definition: lldb-riscv-register-enums.h:29
fpr_f0_riscv
@ fpr_f0_riscv
Definition: lldb-riscv-register-enums.h:87
lldb-defines.h
gpr_x31_riscv
@ gpr_x31_riscv
Definition: lldb-riscv-register-enums.h:50
fpr_f31_riscv
@ fpr_f31_riscv
Definition: lldb-riscv-register-enums.h:118
g_reg_sets_riscv64
static const lldb_private::RegisterSet g_reg_sets_riscv64[k_num_register_sets]
Definition: RegisterInfoPOSIX_riscv64.cpp:94
gpr_x12_riscv
@ gpr_x12_riscv
Definition: lldb-riscv-register-enums.h:31
fpr_f5_riscv
@ fpr_f5_riscv
Definition: lldb-riscv-register-enums.h:92
fpr_f15_riscv
@ fpr_f15_riscv
Definition: lldb-riscv-register-enums.h:102
gpr_fp_riscv
@ gpr_fp_riscv
Definition: lldb-riscv-register-enums.h:60
gpr_x17_riscv
@ gpr_x17_riscv
Definition: lldb-riscv-register-enums.h:36
lldb_private::Flags
Definition: Flags.h:22
GetRegisterInfoCount
static uint32_t GetRegisterInfoCount(const ArchSpec &target_arch)
Definition: RegisterContextLinux_s390x.cpp:30
gpr_x24_riscv
@ gpr_x24_riscv
Definition: lldb-riscv-register-enums.h:43
fpr_f10_riscv
@ fpr_f10_riscv
Definition: lldb-riscv-register-enums.h:97
fpr_fcsr_riscv
@ fpr_fcsr_riscv
Definition: lldb-riscv-register-enums.h:120
fpr_f24_riscv
@ fpr_f24_riscv
Definition: lldb-riscv-register-enums.h:111
gpr_x18_riscv
@ gpr_x18_riscv
Definition: lldb-riscv-register-enums.h:37
gpr_x7_riscv
@ gpr_x7_riscv
Definition: lldb-riscv-register-enums.h:26
fpr_f19_riscv
@ fpr_f19_riscv
Definition: lldb-riscv-register-enums.h:106
RegisterInfos_riscv64.h
fpr_f6_riscv
@ fpr_f6_riscv
Definition: lldb-riscv-register-enums.h:93
RegisterInfoPOSIX_riscv64::GetRegisterSetFromRegisterIndex
size_t GetRegisterSetFromRegisterIndex(uint32_t reg_index) const override
Definition: RegisterInfoPOSIX_riscv64.cpp:127
RegisterInfoPOSIX_riscv64::GPRegSet
@ GPRegSet
Definition: RegisterInfoPOSIX_riscv64.h:26
fpr_f14_riscv
@ fpr_f14_riscv
Definition: lldb-riscv-register-enums.h:101
RegisterInfoPOSIX_riscv64::RegisterInfoPOSIX_riscv64
RegisterInfoPOSIX_riscv64(const lldb_private::ArchSpec &target_arch, lldb_private::Flags flags)
Definition: RegisterInfoPOSIX_riscv64.cpp:100
fpr_f9_riscv
@ fpr_f9_riscv
Definition: lldb-riscv-register-enums.h:96
fpr_f20_riscv
@ fpr_f20_riscv
Definition: lldb-riscv-register-enums.h:107
fpr_f29_riscv
@ fpr_f29_riscv
Definition: lldb-riscv-register-enums.h:116
fpr_f13_riscv
@ fpr_f13_riscv
Definition: lldb-riscv-register-enums.h:100
gpr_x30_riscv
@ gpr_x30_riscv
Definition: lldb-riscv-register-enums.h:49
gpr_x14_riscv
@ gpr_x14_riscv
Definition: lldb-riscv-register-enums.h:33
RegisterInfoPOSIX_riscv64::GetRegisterCount
uint32_t GetRegisterCount() const override
Definition: RegisterInfoPOSIX_riscv64.cpp:106
RegisterInfoPOSIX_riscv64::GetRegisterInfoCount
static uint32_t GetRegisterInfoCount(const lldb_private::ArchSpec &target_arch)
Definition: RegisterInfoPOSIX_riscv64.cpp:40
gpr_pc_riscv
@ gpr_pc_riscv
Definition: lldb-riscv-register-enums.h:19
RegisterInfoPOSIX_riscv64::GetRegisterSet
const lldb_private::RegisterSet * GetRegisterSet(size_t reg_set) const override
Definition: RegisterInfoPOSIX_riscv64.cpp:138
gpr_x0_riscv
@ gpr_x0_riscv
Definition: lldb-riscv-register-enums.h:51
gpr_x25_riscv
@ gpr_x25_riscv
Definition: lldb-riscv-register-enums.h:44
gpr_x6_riscv
@ gpr_x6_riscv
Definition: lldb-riscv-register-enums.h:25
fpr_f4_riscv
@ fpr_f4_riscv
Definition: lldb-riscv-register-enums.h:91
RegisterInfoPOSIX_riscv64::GetFPRSize
size_t GetFPRSize() const override
Definition: RegisterInfoPOSIX_riscv64.cpp:114
g_fpr_regnums_riscv64
static const uint32_t g_fpr_regnums_riscv64[]
Definition: RegisterInfoPOSIX_riscv64.cpp:77
fpr_f2_riscv
@ fpr_f2_riscv
Definition: lldb-riscv-register-enums.h:89
RegisterInfoPOSIX_riscv64::m_register_info_p
const lldb_private::RegisterInfo * m_register_info_p
Definition: RegisterInfoPOSIX_riscv64.h:57
gpr_x22_riscv
@ gpr_x22_riscv
Definition: lldb-riscv-register-enums.h:41
gpr_x23_riscv
@ gpr_x23_riscv
Definition: lldb-riscv-register-enums.h:42
fpr_f27_riscv
@ fpr_f27_riscv
Definition: lldb-riscv-register-enums.h:114
RegisterInfoPOSIX_riscv64::GetRegisterInfoPtr
static const lldb_private::RegisterInfo * GetRegisterInfoPtr(const lldb_private::ArchSpec &target_arch)
Definition: RegisterInfoPOSIX_riscv64.cpp:29
fpr_f17_riscv
@ fpr_f17_riscv
Definition: lldb-riscv-register-enums.h:104
fpr_f12_riscv
@ fpr_f12_riscv
Definition: lldb-riscv-register-enums.h:99
uint32_t
fpr_f25_riscv
@ fpr_f25_riscv
Definition: lldb-riscv-register-enums.h:112
gpr_x19_riscv
@ gpr_x19_riscv
Definition: lldb-riscv-register-enums.h:38
gpr_x11_riscv
@ gpr_x11_riscv
Definition: lldb-riscv-register-enums.h:30
RegisterInfoPOSIX_riscv64::m_register_info_count
uint32_t m_register_info_count
Definition: RegisterInfoPOSIX_riscv64.h:58
fpr_f1_riscv
@ fpr_f1_riscv
Definition: lldb-riscv-register-enums.h:88
gpr_x16_riscv
@ gpr_x16_riscv
Definition: lldb-riscv-register-enums.h:35
gpr_last_riscv
@ gpr_last_riscv
Definition: lldb-riscv-register-enums.h:84
fpr_f11_riscv
@ fpr_f11_riscv
Definition: lldb-riscv-register-enums.h:98
gpr_first_riscv
@ gpr_first_riscv
Definition: lldb-riscv-register-enums.h:18
gpr_x5_riscv
@ gpr_x5_riscv
Definition: lldb-riscv-register-enums.h:24
k_num_fpr_registers
@ k_num_fpr_registers
Definition: RegisterInfoPOSIX_riscv64.cpp:55
gpr_ra_riscv
@ gpr_ra_riscv
Definition: lldb-riscv-register-enums.h:53
fpr_f28_riscv
@ fpr_f28_riscv
Definition: lldb-riscv-register-enums.h:115
lldb_private
A class that represents a running process on the host machine.
Definition: SBCommandInterpreterRunOptions.h:16
fpr_first_riscv
@ fpr_first_riscv
Definition: lldb-riscv-register-enums.h:86
gpr_x28_riscv
@ gpr_x28_riscv
Definition: lldb-riscv-register-enums.h:47
gpr_sp_riscv
@ gpr_sp_riscv
Definition: lldb-riscv-register-enums.h:54
gpr_x13_riscv
@ gpr_x13_riscv
Definition: lldb-riscv-register-enums.h:32
fpr_f16_riscv
@ fpr_f16_riscv
Definition: lldb-riscv-register-enums.h:103
gpr_x21_riscv
@ gpr_x21_riscv
Definition: lldb-riscv-register-enums.h:40
Flags.h
RegisterInfoPOSIX_riscv64::FPRegSet
@ FPRegSet
Definition: RegisterInfoPOSIX_riscv64.h:26
k_num_gpr_registers
@ k_num_gpr_registers
Definition: RegisterInfoPOSIX_riscv64.cpp:54
gpr_x3_riscv
@ gpr_x3_riscv
Definition: lldb-riscv-register-enums.h:22
fpr_f3_riscv
@ fpr_f3_riscv
Definition: lldb-riscv-register-enums.h:90
RegisterInfoPOSIX_riscv64.h
fpr_last_riscv
@ fpr_last_riscv
Definition: lldb-riscv-register-enums.h:153
gpr_x26_riscv
@ gpr_x26_riscv
Definition: lldb-riscv-register-enums.h:45
RegisterInfoPOSIX_riscv64::GetRegisterSetCount
size_t GetRegisterSetCount() const override
Definition: RegisterInfoPOSIX_riscv64.cpp:123
RegisterInfoPOSIX_riscv64::GPR
Definition: RegisterInfoPOSIX_riscv64.h:28
RegisterInfoPOSIX_riscv64::FPR
Definition: RegisterInfoPOSIX_riscv64.h:33
RegisterInfoPOSIX_riscv64::GetGPRSize
size_t GetGPRSize() const override
Definition: RegisterInfoPOSIX_riscv64.cpp:110
gpr_x20_riscv
@ gpr_x20_riscv
Definition: lldb-riscv-register-enums.h:39
gpr_x4_riscv
@ gpr_x4_riscv
Definition: lldb-riscv-register-enums.h:23
g_gpr_regnums_riscv64
static const uint32_t g_gpr_regnums_riscv64[]
Definition: RegisterInfoPOSIX_riscv64.cpp:60
RegisterInfoPOSIX_riscv64::GetRegisterInfo
const lldb_private::RegisterInfo * GetRegisterInfo() const override
Definition: RegisterInfoPOSIX_riscv64.cpp:119
fpr_f7_riscv
@ fpr_f7_riscv
Definition: lldb-riscv-register-enums.h:94
fpr_f18_riscv
@ fpr_f18_riscv
Definition: lldb-riscv-register-enums.h:105
k_num_register_sets
@ k_num_register_sets
Definition: RegisterInfoPOSIX_riscv64.cpp:56
gpr_x29_riscv
@ gpr_x29_riscv
Definition: lldb-riscv-register-enums.h:48
GetRegisterInfoPtr
static const RegisterInfo * GetRegisterInfoPtr(const ArchSpec &target_arch)
Definition: RegisterContextLinux_s390x.cpp:20