29 "Mips-specific algorithms",
44 bool is_alternate_isa =
false;
51 is_alternate_isa =
true;
56 if ((code_addr & 2ull) || is_alternate_isa)
57 return code_addr | 1u;
69 return opcode_addr & ~(1ull);
80 if (section_load_list.
IsEmpty())
91 ModuleSP temp_addr_module_sp(resolved_addr.
GetModule());
92 if (temp_addr_module_sp) {
94 SymbolContextItem resolve_scope =
95 eSymbolContextFunction | eSymbolContextSymbol;
96 temp_addr_module_sp->ResolveSymbolContextForAddress(resolved_addr,
109 current_offset = addr - function_start;
114 if (current_offset == 0)
117 auto insn = GetInstructionAtAddress(target, current_offset, addr);
119 if (
nullptr == insn || !insn->HasDelaySlot())
123 uint64_t breakable_addr = addr - insn->GetOpcode().GetByteSize();
125 "Target::%s Breakpoint at 0x%8.8" PRIx64
126 " is adjusted to 0x%8.8" PRIx64
" due to delay slot\n",
127 __FUNCTION__, addr, breakable_addr);
129 return breakable_addr;
135 auto loop_count = symbol_offset / 2;
137 uint32_t arch_flags = m_arch.GetFlags();
141 if (loop_count > 3) {
143 if (IsMips16 | IsMicromips)
152 lldb::DisassemblerSP disasm_sp(
156 InstructionSP prev_insn;
161 for (
uint32_t i = 1; i <= loop_count; i++) {
166 disasm_sp->ParseInstructions(target, addr,
169 uint32_t num_insns = disasm_sp->GetInstructionList().GetSize();
171 prev_insn = disasm_sp->GetInstructionList().GetInstructionAtIndex(0);
172 insn_size = prev_insn->GetOpcode().GetByteSize();
173 if (i == 1 && insn_size == 2) {
176 instruction_list.
Append(prev_insn);
181 if (num_insns == 2) {
191 else if (insn_size == 4) {
195 instruction_list.
Append(prev_insn);
218 inst_to_choose = i - 1;
225 if (inst_to_choose) {
226 if (inst_to_choose > instruction_list.
GetSize())