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NativeRegisterContextLinux_arm.cpp
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1//===-- NativeRegisterContextLinux_arm.cpp --------------------------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8
9#if defined(__arm__) || defined(__arm64__) || defined(__aarch64__)
10
12
17#include "lldb/Host/HostInfo.h"
19#include "lldb/Utility/Log.h"
21#include "lldb/Utility/Status.h"
22
23#if defined(__arm64__) || defined(__aarch64__)
25#endif
26
27// System includes - They have to be included after framework includes because
28// they define some macros which collide with variable names in other modules.
29#include <elf.h>
30#include <sys/ptrace.h>
31#include <sys/uio.h>
32
33#define REG_CONTEXT_SIZE (GetGPRSize() + sizeof(m_fpr) + sizeof(m_tls))
34
35#ifndef PTRACE_GETVFPREGS
36#define PTRACE_GETVFPREGS 27
37#define PTRACE_SETVFPREGS 28
38#endif
39#if defined(__arm__) && !defined(PTRACE_GETHBPREGS)
40#define PTRACE_GETHBPREGS 29
41#define PTRACE_SETHBPREGS 30
42#endif
43#if !defined(PTRACE_TYPE_ARG3)
44#define PTRACE_TYPE_ARG3 void *
45#endif
46#if !defined(PTRACE_TYPE_ARG4)
47#define PTRACE_TYPE_ARG4 void *
48#endif
49
50#ifndef PTRACE_GET_THREAD_AREA
51#define PTRACE_GET_THREAD_AREA 22
52#endif
53
54using namespace lldb;
55using namespace lldb_private;
56using namespace lldb_private::process_linux;
57
58#if defined(__arm__)
59
60std::unique_ptr<NativeRegisterContextLinux>
62 const ArchSpec &target_arch, NativeThreadLinux &native_thread) {
63 return std::make_unique<NativeRegisterContextLinux_arm>(target_arch,
64 native_thread);
65}
66
67llvm::Expected<ArchSpec>
69 return HostInfo::GetArchitecture();
70}
71
72#endif // defined(__arm__)
73
74NativeRegisterContextLinux_arm::NativeRegisterContextLinux_arm(
75 const ArchSpec &target_arch, NativeThreadProtocol &native_thread)
77 native_thread,
78 new RegisterInfoPOSIX_arm(target_arch, /*has_tls_reg=*/true)),
79 NativeRegisterContextLinux(native_thread) {
80 assert(target_arch.GetMachine() == llvm::Triple::arm);
81
82 ::memset(&m_fpr, 0, sizeof(m_fpr));
83 ::memset(&m_tls, 0, sizeof(m_tls));
84 ::memset(&m_gpr_arm, 0, sizeof(m_gpr_arm));
85
86 // 16 is just a maximum value, query hardware for actual watchpoint count
87 m_max_hwp_supported = 16;
88 m_max_hbp_supported = 16;
89 m_refresh_hwdebug_info = true;
90}
91
92RegisterInfoPOSIX_arm &NativeRegisterContextLinux_arm::GetRegisterInfo() const {
93 return static_cast<RegisterInfoPOSIX_arm &>(*m_register_info_interface_up);
94}
95
96uint32_t NativeRegisterContextLinux_arm::GetRegisterSetCount() const {
97 return GetRegisterInfo().GetRegisterSetCount();
98}
99
100uint32_t NativeRegisterContextLinux_arm::GetUserRegisterCount() const {
101 uint32_t count = 0;
102 for (uint32_t set_index = 0; set_index < GetRegisterSetCount(); ++set_index)
103 count += GetRegisterSet(set_index)->num_registers;
104 return count;
105}
106
107const RegisterSet *
108NativeRegisterContextLinux_arm::GetRegisterSet(uint32_t set_index) const {
109 return GetRegisterInfo().GetRegisterSet(set_index);
110}
111
112Status
113NativeRegisterContextLinux_arm::ReadRegister(const RegisterInfo *reg_info,
114 RegisterValue &reg_value) {
116
117 if (!reg_info) {
118 error = Status::FromErrorString("reg_info NULL");
119 return error;
120 }
121
122 const uint32_t reg = reg_info->kinds[lldb::eRegisterKindLLDB];
123
124 if (IsFPR(reg)) {
125 error = ReadFPR();
126 if (error.Fail())
127 return error;
128 } else if (IsTLS(reg)) {
129 error = ReadTLS();
130 if (error.Success())
131 reg_value.SetUInt32(m_tls.tpidruro);
132 return error;
133 } else {
134 uint32_t full_reg = reg;
135 bool is_subreg = reg_info->invalidate_regs &&
136 (reg_info->invalidate_regs[0] != LLDB_INVALID_REGNUM);
137
138 if (is_subreg) {
139 // Read the full aligned 64-bit register.
140 full_reg = reg_info->invalidate_regs[0];
141 }
142
143 error = ReadRegisterRaw(full_reg, reg_value);
144
145 if (error.Success()) {
146 // If our read was not aligned (for ah,bh,ch,dh), shift our returned
147 // value one byte to the right.
148 if (is_subreg && (reg_info->byte_offset & 0x1))
149 reg_value.SetUInt64(reg_value.GetAsUInt64() >> 8);
150
151 // If our return byte size was greater than the return value reg size,
152 // then use the type specified by reg_info rather than the uint64_t
153 // default
154 if (reg_value.GetByteSize() > reg_info->byte_size)
155 reg_value.SetType(*reg_info);
156 }
157 return error;
158 }
159
160 // Get pointer to m_fpr variable and set the data from it.
161 uint32_t fpr_offset = CalculateFprOffset(reg_info);
162 assert(fpr_offset < sizeof m_fpr);
163 uint8_t *src = (uint8_t *)&m_fpr + fpr_offset;
164 switch (reg_info->byte_size) {
165 case 2:
166 reg_value.SetUInt16(*(uint16_t *)src);
167 break;
168 case 4:
169 reg_value.SetUInt32(*(uint32_t *)src);
170 break;
171 case 8:
172 reg_value.SetUInt64(*(uint64_t *)src);
173 break;
174 case 16:
175 reg_value.SetBytes(src, 16, GetByteOrder());
176 break;
177 default:
178 assert(false && "Unhandled data size.");
179 error = Status::FromErrorStringWithFormat("unhandled byte size: %" PRIu32,
180 reg_info->byte_size);
181 break;
182 }
183
184 return error;
185}
186
187Status
188NativeRegisterContextLinux_arm::WriteRegister(const RegisterInfo *reg_info,
189 const RegisterValue &reg_value) {
190 if (!reg_info)
191 return Status::FromErrorString("reg_info NULL");
192
193 const uint32_t reg_index = reg_info->kinds[lldb::eRegisterKindLLDB];
194 if (reg_index == LLDB_INVALID_REGNUM)
196 "no lldb regnum for %s",
197 reg_info && reg_info->name ? reg_info->name : "<unknown register>");
198
199 if (IsGPR(reg_index))
200 return WriteRegisterRaw(reg_index, reg_value);
201
202 if (IsFPR(reg_index)) {
203 // Get pointer to m_fpr variable and set the data to it.
204 uint32_t fpr_offset = CalculateFprOffset(reg_info);
205 assert(fpr_offset < sizeof m_fpr);
206 uint8_t *dst = (uint8_t *)&m_fpr + fpr_offset;
207 ::memcpy(dst, reg_value.GetBytes(), reg_info->byte_size);
208
209 return WriteFPR();
210 }
211
212 if (IsTLS(reg_index))
214 "writing to a thread pointer register is not implemented");
215
217 "failed - register wasn't recognized to be a GPR or an FPR, "
218 "write strategy unknown");
219}
220
221Status NativeRegisterContextLinux_arm::ReadAllRegisterValues(
224
225 data_sp.reset(new DataBufferHeap(REG_CONTEXT_SIZE, 0));
226 error = ReadGPR();
227 if (error.Fail())
228 return error;
229
230 error = ReadFPR();
231 if (error.Fail())
232 return error;
233
234 error = ReadTLS();
235 if (error.Fail())
236 return error;
237
238 uint8_t *dst = data_sp->GetBytes();
239 ::memcpy(dst, &m_gpr_arm, GetGPRSize());
240 dst += GetGPRSize();
241 ::memcpy(dst, &m_fpr, sizeof(m_fpr));
242 dst += sizeof(m_fpr);
243 ::memcpy(dst, &m_tls, sizeof(m_tls));
244
245 return error;
246}
247
248Status NativeRegisterContextLinux_arm::WriteAllRegisterValues(
249 const lldb::DataBufferSP &data_sp) {
251
252 if (!data_sp) {
254 "NativeRegisterContextLinux_arm::%s invalid data_sp provided",
255 __FUNCTION__);
256 return error;
257 }
258
259 if (data_sp->GetByteSize() != REG_CONTEXT_SIZE) {
261 "NativeRegisterContextLinux_arm::%s data_sp contained mismatched "
262 "data size, expected %" PRIu64 ", actual %" PRIu64,
263 __FUNCTION__, (uint64_t)REG_CONTEXT_SIZE, data_sp->GetByteSize());
264 return error;
265 }
266
267 const uint8_t *src = data_sp->GetBytes();
268 if (src == nullptr) {
270 "NativeRegisterContextLinux_arm::%s "
271 "DataBuffer::GetBytes() returned a null "
272 "pointer",
273 __FUNCTION__);
274 return error;
275 }
276 ::memcpy(&m_gpr_arm, src, GetRegisterInfoInterface().GetGPRSize());
277
278 error = WriteGPR();
279 if (error.Fail())
280 return error;
281
282 src += GetRegisterInfoInterface().GetGPRSize();
283 ::memcpy(&m_fpr, src, sizeof(m_fpr));
284
285 error = WriteFPR();
286 if (error.Fail())
287 return error;
288
289 // Note: writing to a thread pointer register is not implemented.
290
291 return error;
292}
293
294bool NativeRegisterContextLinux_arm::IsGPR(unsigned reg) const {
295 if (GetRegisterInfo().GetRegisterSetFromRegisterIndex(reg) ==
297 return true;
298 return false;
299}
300
301bool NativeRegisterContextLinux_arm::IsFPR(unsigned reg) const {
302 if (GetRegisterInfo().GetRegisterSetFromRegisterIndex(reg) ==
304 return true;
305 return false;
306}
307
308bool NativeRegisterContextLinux_arm::IsTLS(unsigned reg) const {
309 return GetRegisterInfo().GetRegisterSetFromRegisterIndex(reg) ==
311}
312
313llvm::Error NativeRegisterContextLinux_arm::ReadHardwareDebugInfo() {
314 if (!m_refresh_hwdebug_info)
315 return llvm::Error::success();
316
317#ifdef __arm__
318 unsigned int cap_val;
320 PTRACE_GETHBPREGS, m_thread.GetID(), nullptr, &cap_val,
321 sizeof(unsigned int));
322
323 if (error.Fail())
324 return error.ToError();
325
326 m_max_hwp_supported = (cap_val >> 8) & 0xff;
327 m_max_hbp_supported = cap_val & 0xff;
328 m_refresh_hwdebug_info = false;
329
330 return error.ToError();
331#else // __aarch64__
332 return arm64::ReadHardwareDebugInfo(m_thread.GetID(), m_max_hwp_supported,
333 m_max_hbp_supported)
334 .ToError();
335#endif // ifdef __arm__
336}
337
338llvm::Error
339NativeRegisterContextLinux_arm::WriteHardwareDebugRegs(DREGType hwbType) {
340#ifdef __arm__
341 uint32_t max_index = m_max_hbp_supported;
342 if (hwbType == eDREGTypeWATCH)
343 max_index = m_max_hwp_supported;
344
345 for (uint32_t idx = 0; idx < max_index; ++idx)
346 if (auto error = WriteHardwareDebugReg(hwbType, idx))
347 return error;
348
349 return llvm::Error::success();
350#else // __aarch64__
351 uint32_t max_supported =
353 ? m_max_hwp_supported
354 : m_max_hbp_supported;
355 auto &regs = (hwbType == NativeRegisterContextDBReg::eDREGTypeWATCH)
356 ? m_hwp_regs
357 : m_hbp_regs;
358 return arm64::WriteHardwareDebugRegs(hwbType, m_thread.GetID(), max_supported,
359 regs)
360 .ToError();
361#endif // ifdef __arm__
362}
363
364#ifdef __arm__
365llvm::Error
366NativeRegisterContextLinux_arm::WriteHardwareDebugReg(DREGType hwbType,
367 int hwb_index) {
369 lldb::addr_t *addr_buf;
370 uint32_t *ctrl_buf;
371 int addr_idx = (hwb_index << 1) + 1;
372 int ctrl_idx = addr_idx + 1;
373
375 addr_idx *= -1;
376 addr_buf = &m_hwp_regs[hwb_index].address;
377 ctrl_idx *= -1;
378 ctrl_buf = &m_hwp_regs[hwb_index].control;
379 } else {
380 addr_buf = &m_hbp_regs[hwb_index].address;
381 ctrl_buf = &m_hbp_regs[hwb_index].control;
382 }
383
385 PTRACE_SETHBPREGS, m_thread.GetID(), (PTRACE_TYPE_ARG3)(intptr_t)addr_idx,
386 addr_buf, sizeof(unsigned int));
387
388 if (error.Fail())
389 return error.ToError();
390
392 PTRACE_SETHBPREGS, m_thread.GetID(), (PTRACE_TYPE_ARG3)(intptr_t)ctrl_idx,
393 ctrl_buf, sizeof(unsigned int));
394
395 return error.ToError();
396}
397#endif // ifdef __arm__
398
399uint32_t NativeRegisterContextLinux_arm::CalculateFprOffset(
400 const RegisterInfo *reg_info) const {
401 return reg_info->byte_offset - GetGPRSize();
402}
403
404Status NativeRegisterContextLinux_arm::DoReadRegisterValue(
405 uint32_t offset, const char *reg_name, uint32_t size,
406 RegisterValue &value) {
407 // PTRACE_PEEKUSER don't work in the aarch64 linux kernel used on android
408 // devices (always return "Bad address"). To avoid using PTRACE_PEEKUSER we
409 // read out the full GPR register set instead. This approach is about 4 times
410 // slower but the performance overhead is negligible in comparison to
411 // processing time in lldb-server.
412 assert(offset % 4 == 0 && "Try to write a register with unaligned offset");
413 if (offset + sizeof(uint32_t) > sizeof(m_gpr_arm))
415 "Register isn't fit into the size of the GPR area");
416
417 Status error = ReadGPR();
418 if (error.Fail())
419 return error;
420
421 value.SetUInt32(m_gpr_arm[offset / sizeof(uint32_t)]);
422 return Status();
423}
424
425Status NativeRegisterContextLinux_arm::DoWriteRegisterValue(
426 uint32_t offset, const char *reg_name, const RegisterValue &value) {
427 // PTRACE_POKEUSER don't work in the aarch64 linux kernel used on android
428 // devices (always return "Bad address"). To avoid using PTRACE_POKEUSER we
429 // read out the full GPR register set, modify the requested register and
430 // write it back. This approach is about 4 times slower but the performance
431 // overhead is negligible in comparison to processing time in lldb-server.
432 assert(offset % 4 == 0 && "Try to write a register with unaligned offset");
433 if (offset + sizeof(uint32_t) > sizeof(m_gpr_arm))
435 "Register isn't fit into the size of the GPR area");
436
437 Status error = ReadGPR();
438 if (error.Fail())
439 return error;
440
441 uint32_t reg_value = value.GetAsUInt32();
442 // As precaution for an undefined behavior encountered while setting PC we
443 // will clear thumb bit of new PC if we are already in thumb mode; that is
444 // CPSR thumb mode bit is set.
445 if (offset / sizeof(uint32_t) == gpr_pc_arm) {
446 // Check if we are already in thumb mode and thumb bit of current PC is
447 // read out to be zero and thumb bit of next PC is read out to be one.
448 if ((m_gpr_arm[gpr_cpsr_arm] & 0x20) && !(m_gpr_arm[gpr_pc_arm] & 0x01) &&
449 (value.GetAsUInt32() & 0x01)) {
450 reg_value &= (~1ull);
451 }
452 }
453
454 m_gpr_arm[offset / sizeof(uint32_t)] = reg_value;
455 return WriteGPR();
456}
457
458Status NativeRegisterContextLinux_arm::ReadGPR() {
459#ifdef __arm__
461#else // __aarch64__
462 struct iovec ioVec;
463 ioVec.iov_base = GetGPRBuffer();
464 ioVec.iov_len = GetGPRSize();
465
466 return ReadRegisterSet(&ioVec, GetGPRSize(), NT_PRSTATUS);
467#endif // __arm__
468}
469
470Status NativeRegisterContextLinux_arm::WriteGPR() {
471#ifdef __arm__
473#else // __aarch64__
474 struct iovec ioVec;
475 ioVec.iov_base = GetGPRBuffer();
476 ioVec.iov_len = GetGPRSize();
477
478 return WriteRegisterSet(&ioVec, GetGPRSize(), NT_PRSTATUS);
479#endif // __arm__
480}
481
482Status NativeRegisterContextLinux_arm::ReadFPR() {
483#ifdef __arm__
484 return NativeProcessLinux::PtraceWrapper(PTRACE_GETVFPREGS, m_thread.GetID(),
485 nullptr, GetFPRBuffer(),
486 GetFPRSize());
487#else // __aarch64__
488 struct iovec ioVec;
489 ioVec.iov_base = GetFPRBuffer();
490 ioVec.iov_len = GetFPRSize();
491
492 return ReadRegisterSet(&ioVec, GetFPRSize(), NT_ARM_VFP);
493#endif // __arm__
494}
495
496Status NativeRegisterContextLinux_arm::WriteFPR() {
497#ifdef __arm__
498 return NativeProcessLinux::PtraceWrapper(PTRACE_SETVFPREGS, m_thread.GetID(),
499 nullptr, GetFPRBuffer(),
500 GetFPRSize());
501#else // __aarch64__
502 struct iovec ioVec;
503 ioVec.iov_base = GetFPRBuffer();
504 ioVec.iov_len = GetFPRSize();
505
506 return WriteRegisterSet(&ioVec, GetFPRSize(), NT_ARM_VFP);
507#endif // __arm__
508}
509
510Status NativeRegisterContextLinux_arm::ReadTLS() {
511#ifdef __arm__
512 return NativeProcessLinux::PtraceWrapper(PTRACE_GET_THREAD_AREA,
513 m_thread.GetID(), nullptr,
514 GetTLSBuffer(), GetTLSSize());
515#else // __aarch64__
517
518 struct iovec ioVec;
519 ioVec.iov_base = GetTLSBuffer();
520 ioVec.iov_len = GetTLSSize();
521
522 return ReadRegisterSet(&ioVec, GetTLSSize(), NT_ARM_TLS);
523#endif // __arm__
524}
525
526#endif // defined(__arm__) || defined(__arm64__) || defined(__aarch64__)
static llvm::raw_ostream & error(Stream &strm)
#define REG_CONTEXT_SIZE
size_t GetRegisterSetCount() const override
A subclass of DataBuffer that stores a data buffer on the heap.
void SetUInt64(uint64_t uint, Type t=eTypeUInt64)
void SetUInt16(uint16_t uint)
uint64_t GetAsUInt64(uint64_t fail_value=UINT64_MAX, bool *success_ptr=nullptr) const
void SetBytes(const void *bytes, size_t length, lldb::ByteOrder byte_order)
const void * GetBytes() const
void SetType(RegisterValue::Type type)
uint32_t GetAsUInt32(uint32_t fail_value=UINT32_MAX, bool *success_ptr=nullptr) const
void SetUInt32(uint32_t uint, Type t=eTypeUInt32)
static Status FromErrorStringWithFormat(const char *format,...) __attribute__((format(printf
Definition Status.cpp:106
static Status FromErrorString(const char *str)
Definition Status.h:141
static Status PtraceWrapper(int req, lldb::pid_t pid, void *addr=nullptr, void *data=nullptr, size_t data_size=0, long *result=nullptr)
}
static std::unique_ptr< NativeRegisterContextLinux > CreateHostNativeRegisterContextLinux(const ArchSpec &target_arch, NativeThreadLinux &native_thread)
static llvm::Expected< ArchSpec > DetermineArchitecture(lldb::tid_t tid)
#define LLDB_INVALID_REGNUM
Status WriteHardwareDebugRegs(int hwbType, ::pid_t tid, uint32_t max_supported, const std::array< NativeRegisterContextDBReg::DREG, 16 > &regs)
Status ReadHardwareDebugInfo(::pid_t tid, uint32_t &max_hwp_supported, uint32_t &max_hbp_supported)
A class that represents a running process on the host machine.
std::shared_ptr< lldb_private::DataBuffer > DataBufferSP
std::shared_ptr< lldb_private::WritableDataBuffer > WritableDataBufferSP
uint64_t addr_t
Definition lldb-types.h:80
uint64_t tid_t
Definition lldb-types.h:85
@ eRegisterKindLLDB
lldb's internal register numbers
Every register is described in detail including its name, alternate name (optional),...
uint32_t byte_offset
The byte offset in the register context data where this register's value is found.
uint32_t byte_size
Size in bytes of the register.
uint32_t kinds[lldb::kNumRegisterKinds]
Holds all of the various register numbers for all register kinds.
const char * name
Name of this register, can't be NULL.
uint32_t * invalidate_regs
List of registers (terminated with LLDB_INVALID_REGNUM).
Registers are grouped into register sets.