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NativeRegisterContextLinux_arm.cpp
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1//===-- NativeRegisterContextLinux_arm.cpp --------------------------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8
9#if defined(__arm__) || defined(__arm64__) || defined(__aarch64__)
10
12
17#include "lldb/Host/HostInfo.h"
19#include "lldb/Utility/Log.h"
21#include "lldb/Utility/Status.h"
22
23#include <elf.h>
24#include <sys/uio.h>
25
26#if defined(__arm64__) || defined(__aarch64__)
29#include <asm/ptrace.h>
30#endif
31
32#define REG_CONTEXT_SIZE (GetGPRSize() + sizeof(m_fpr))
33
34#ifndef PTRACE_GETVFPREGS
35#define PTRACE_GETVFPREGS 27
36#define PTRACE_SETVFPREGS 28
37#endif
38#if defined(__arm__) && !defined(PTRACE_GETHBPREGS)
39#define PTRACE_GETHBPREGS 29
40#define PTRACE_SETHBPREGS 30
41#endif
42#if !defined(PTRACE_TYPE_ARG3)
43#define PTRACE_TYPE_ARG3 void *
44#endif
45#if !defined(PTRACE_TYPE_ARG4)
46#define PTRACE_TYPE_ARG4 void *
47#endif
48
49using namespace lldb;
50using namespace lldb_private;
51using namespace lldb_private::process_linux;
52
53#if defined(__arm__)
54
55std::unique_ptr<NativeRegisterContextLinux>
57 const ArchSpec &target_arch, NativeThreadLinux &native_thread) {
58 return std::make_unique<NativeRegisterContextLinux_arm>(target_arch,
59 native_thread);
60}
61
62llvm::Expected<ArchSpec>
64 return HostInfo::GetArchitecture();
65}
66
67#endif // defined(__arm__)
68
69NativeRegisterContextLinux_arm::NativeRegisterContextLinux_arm(
70 const ArchSpec &target_arch, NativeThreadProtocol &native_thread)
72 new RegisterInfoPOSIX_arm(target_arch)),
73 NativeRegisterContextLinux(native_thread) {
74 assert(target_arch.GetMachine() == llvm::Triple::arm);
75
76 ::memset(&m_fpr, 0, sizeof(m_fpr));
77 ::memset(&m_gpr_arm, 0, sizeof(m_gpr_arm));
78 ::memset(&m_hwp_regs, 0, sizeof(m_hwp_regs));
79 ::memset(&m_hbp_regs, 0, sizeof(m_hbp_regs));
80
81 // 16 is just a maximum value, query hardware for actual watchpoint count
82 m_max_hwp_supported = 16;
83 m_max_hbp_supported = 16;
84 m_refresh_hwdebug_info = true;
85}
86
87RegisterInfoPOSIX_arm &NativeRegisterContextLinux_arm::GetRegisterInfo() const {
88 return static_cast<RegisterInfoPOSIX_arm &>(*m_register_info_interface_up);
89}
90
91uint32_t NativeRegisterContextLinux_arm::GetRegisterSetCount() const {
92 return GetRegisterInfo().GetRegisterSetCount();
93}
94
95uint32_t NativeRegisterContextLinux_arm::GetUserRegisterCount() const {
96 uint32_t count = 0;
97 for (uint32_t set_index = 0; set_index < GetRegisterSetCount(); ++set_index)
98 count += GetRegisterSet(set_index)->num_registers;
99 return count;
100}
101
102const RegisterSet *
103NativeRegisterContextLinux_arm::GetRegisterSet(uint32_t set_index) const {
104 return GetRegisterInfo().GetRegisterSet(set_index);
105}
106
107Status
108NativeRegisterContextLinux_arm::ReadRegister(const RegisterInfo *reg_info,
109 RegisterValue &reg_value) {
111
112 if (!reg_info) {
113 error = Status::FromErrorString("reg_info NULL");
114 return error;
115 }
116
117 const uint32_t reg = reg_info->kinds[lldb::eRegisterKindLLDB];
118
119 if (IsFPR(reg)) {
120 error = ReadFPR();
121 if (error.Fail())
122 return error;
123 } else {
124 uint32_t full_reg = reg;
125 bool is_subreg = reg_info->invalidate_regs &&
126 (reg_info->invalidate_regs[0] != LLDB_INVALID_REGNUM);
127
128 if (is_subreg) {
129 // Read the full aligned 64-bit register.
130 full_reg = reg_info->invalidate_regs[0];
131 }
132
133 error = ReadRegisterRaw(full_reg, reg_value);
134
135 if (error.Success()) {
136 // If our read was not aligned (for ah,bh,ch,dh), shift our returned
137 // value one byte to the right.
138 if (is_subreg && (reg_info->byte_offset & 0x1))
139 reg_value.SetUInt64(reg_value.GetAsUInt64() >> 8);
140
141 // If our return byte size was greater than the return value reg size,
142 // then use the type specified by reg_info rather than the uint64_t
143 // default
144 if (reg_value.GetByteSize() > reg_info->byte_size)
145 reg_value.SetType(*reg_info);
146 }
147 return error;
148 }
149
150 // Get pointer to m_fpr variable and set the data from it.
151 uint32_t fpr_offset = CalculateFprOffset(reg_info);
152 assert(fpr_offset < sizeof m_fpr);
153 uint8_t *src = (uint8_t *)&m_fpr + fpr_offset;
154 switch (reg_info->byte_size) {
155 case 2:
156 reg_value.SetUInt16(*(uint16_t *)src);
157 break;
158 case 4:
159 reg_value.SetUInt32(*(uint32_t *)src);
160 break;
161 case 8:
162 reg_value.SetUInt64(*(uint64_t *)src);
163 break;
164 case 16:
165 reg_value.SetBytes(src, 16, GetByteOrder());
166 break;
167 default:
168 assert(false && "Unhandled data size.");
169 error = Status::FromErrorStringWithFormat("unhandled byte size: %" PRIu32,
170 reg_info->byte_size);
171 break;
172 }
173
174 return error;
175}
176
177Status
178NativeRegisterContextLinux_arm::WriteRegister(const RegisterInfo *reg_info,
179 const RegisterValue &reg_value) {
180 if (!reg_info)
181 return Status::FromErrorString("reg_info NULL");
182
183 const uint32_t reg_index = reg_info->kinds[lldb::eRegisterKindLLDB];
184 if (reg_index == LLDB_INVALID_REGNUM)
186 "no lldb regnum for %s",
187 reg_info && reg_info->name ? reg_info->name : "<unknown register>");
188
189 if (IsGPR(reg_index))
190 return WriteRegisterRaw(reg_index, reg_value);
191
192 if (IsFPR(reg_index)) {
193 // Get pointer to m_fpr variable and set the data to it.
194 uint32_t fpr_offset = CalculateFprOffset(reg_info);
195 assert(fpr_offset < sizeof m_fpr);
196 uint8_t *dst = (uint8_t *)&m_fpr + fpr_offset;
197 ::memcpy(dst, reg_value.GetBytes(), reg_info->byte_size);
198
199 return WriteFPR();
200 }
201
203 "failed - register wasn't recognized to be a GPR or an FPR, "
204 "write strategy unknown");
205}
206
207Status NativeRegisterContextLinux_arm::ReadAllRegisterValues(
210
211 data_sp.reset(new DataBufferHeap(REG_CONTEXT_SIZE, 0));
212 error = ReadGPR();
213 if (error.Fail())
214 return error;
215
216 error = ReadFPR();
217 if (error.Fail())
218 return error;
219
220 uint8_t *dst = data_sp->GetBytes();
221 ::memcpy(dst, &m_gpr_arm, GetGPRSize());
222 dst += GetGPRSize();
223 ::memcpy(dst, &m_fpr, sizeof(m_fpr));
224
225 return error;
226}
227
228Status NativeRegisterContextLinux_arm::WriteAllRegisterValues(
229 const lldb::DataBufferSP &data_sp) {
231
232 if (!data_sp) {
234 "NativeRegisterContextLinux_arm::%s invalid data_sp provided",
235 __FUNCTION__);
236 return error;
237 }
238
239 if (data_sp->GetByteSize() != REG_CONTEXT_SIZE) {
241 "NativeRegisterContextLinux_arm::%s data_sp contained mismatched "
242 "data size, expected %" PRIu64 ", actual %" PRIu64,
243 __FUNCTION__, (uint64_t)REG_CONTEXT_SIZE, data_sp->GetByteSize());
244 return error;
245 }
246
247 const uint8_t *src = data_sp->GetBytes();
248 if (src == nullptr) {
250 "NativeRegisterContextLinux_arm::%s "
251 "DataBuffer::GetBytes() returned a null "
252 "pointer",
253 __FUNCTION__);
254 return error;
255 }
256 ::memcpy(&m_gpr_arm, src, GetRegisterInfoInterface().GetGPRSize());
257
258 error = WriteGPR();
259 if (error.Fail())
260 return error;
261
262 src += GetRegisterInfoInterface().GetGPRSize();
263 ::memcpy(&m_fpr, src, sizeof(m_fpr));
264
265 error = WriteFPR();
266 if (error.Fail())
267 return error;
268
269 return error;
270}
271
272bool NativeRegisterContextLinux_arm::IsGPR(unsigned reg) const {
273 if (GetRegisterInfo().GetRegisterSetFromRegisterIndex(reg) ==
275 return true;
276 return false;
277}
278
279bool NativeRegisterContextLinux_arm::IsFPR(unsigned reg) const {
280 if (GetRegisterInfo().GetRegisterSetFromRegisterIndex(reg) ==
282 return true;
283 return false;
284}
285
286llvm::Error NativeRegisterContextLinux_arm::ReadHardwareDebugInfo() {
287 if (!m_refresh_hwdebug_info)
288 return llvm::Error::success();
289
290#ifdef __arm__
291 unsigned int cap_val;
293 PTRACE_GETHBPREGS, m_thread.GetID(), nullptr, &cap_val,
294 sizeof(unsigned int));
295
296 if (error.Fail())
297 return error.ToError();
298
299 m_max_hwp_supported = (cap_val >> 8) & 0xff;
300 m_max_hbp_supported = cap_val & 0xff;
301 m_refresh_hwdebug_info = false;
302
303 return error.ToError();
304#else // __aarch64__
305 return arm64::ReadHardwareDebugInfo(m_thread.GetID(), m_max_hwp_supported,
306 m_max_hbp_supported)
307 .ToError();
308#endif // ifdef __arm__
309}
310
311llvm::Error
312NativeRegisterContextLinux_arm::WriteHardwareDebugRegs(DREGType hwbType) {
313#ifdef __arm__
314 uint32_t max_index = m_max_hbp_supported;
315 if (hwbType == eDREGTypeWATCH)
316 max_index = m_max_hwp_supported;
317
318 for (uint32_t idx = 0; idx < max_index; ++idx)
319 if (auto error = WriteHardwareDebugReg(hwbType, idx))
320 return error;
321
322 return llvm::Error::success();
323#else // __aarch64__
324 uint32_t max_supported =
326 ? m_max_hwp_supported
327 : m_max_hbp_supported;
328 auto &regs = (hwbType == NativeRegisterContextDBReg::eDREGTypeWATCH)
329 ? m_hwp_regs
330 : m_hbp_regs;
331 return arm64::WriteHardwareDebugRegs(hwbType, m_thread.GetID(), max_supported,
332 regs)
333 .ToError();
334#endif // ifdef __arm__
335}
336
337#ifdef __arm__
338llvm::Error
339NativeRegisterContextLinux_arm::WriteHardwareDebugReg(DREGType hwbType,
340 int hwb_index) {
342 lldb::addr_t *addr_buf;
343 uint32_t *ctrl_buf;
344 int addr_idx = (hwb_index << 1) + 1;
345 int ctrl_idx = addr_idx + 1;
346
348 addr_idx *= -1;
349 addr_buf = &m_hwp_regs[hwb_index].address;
350 ctrl_idx *= -1;
351 ctrl_buf = &m_hwp_regs[hwb_index].control;
352 } else {
353 addr_buf = &m_hbp_regs[hwb_index].address;
354 ctrl_buf = &m_hbp_regs[hwb_index].control;
355 }
356
358 PTRACE_SETHBPREGS, m_thread.GetID(), (PTRACE_TYPE_ARG3)(intptr_t)addr_idx,
359 addr_buf, sizeof(unsigned int));
360
361 if (error.Fail())
362 return error.ToError();
363
365 PTRACE_SETHBPREGS, m_thread.GetID(), (PTRACE_TYPE_ARG3)(intptr_t)ctrl_idx,
366 ctrl_buf, sizeof(unsigned int));
367
368 return error.ToError();
369}
370#endif // ifdef __arm__
371
372uint32_t NativeRegisterContextLinux_arm::CalculateFprOffset(
373 const RegisterInfo *reg_info) const {
374 return reg_info->byte_offset - GetGPRSize();
375}
376
377Status NativeRegisterContextLinux_arm::DoReadRegisterValue(
378 uint32_t offset, const char *reg_name, uint32_t size,
379 RegisterValue &value) {
380 // PTRACE_PEEKUSER don't work in the aarch64 linux kernel used on android
381 // devices (always return "Bad address"). To avoid using PTRACE_PEEKUSER we
382 // read out the full GPR register set instead. This approach is about 4 times
383 // slower but the performance overhead is negligible in comparison to
384 // processing time in lldb-server.
385 assert(offset % 4 == 0 && "Try to write a register with unaligned offset");
386 if (offset + sizeof(uint32_t) > sizeof(m_gpr_arm))
388 "Register isn't fit into the size of the GPR area");
389
390 Status error = ReadGPR();
391 if (error.Fail())
392 return error;
393
394 value.SetUInt32(m_gpr_arm[offset / sizeof(uint32_t)]);
395 return Status();
396}
397
398Status NativeRegisterContextLinux_arm::DoWriteRegisterValue(
399 uint32_t offset, const char *reg_name, const RegisterValue &value) {
400 // PTRACE_POKEUSER don't work in the aarch64 linux kernel used on android
401 // devices (always return "Bad address"). To avoid using PTRACE_POKEUSER we
402 // read out the full GPR register set, modify the requested register and
403 // write it back. This approach is about 4 times slower but the performance
404 // overhead is negligible in comparison to processing time in lldb-server.
405 assert(offset % 4 == 0 && "Try to write a register with unaligned offset");
406 if (offset + sizeof(uint32_t) > sizeof(m_gpr_arm))
408 "Register isn't fit into the size of the GPR area");
409
410 Status error = ReadGPR();
411 if (error.Fail())
412 return error;
413
414 uint32_t reg_value = value.GetAsUInt32();
415 // As precaution for an undefined behavior encountered while setting PC we
416 // will clear thumb bit of new PC if we are already in thumb mode; that is
417 // CPSR thumb mode bit is set.
418 if (offset / sizeof(uint32_t) == gpr_pc_arm) {
419 // Check if we are already in thumb mode and thumb bit of current PC is
420 // read out to be zero and thumb bit of next PC is read out to be one.
421 if ((m_gpr_arm[gpr_cpsr_arm] & 0x20) && !(m_gpr_arm[gpr_pc_arm] & 0x01) &&
422 (value.GetAsUInt32() & 0x01)) {
423 reg_value &= (~1ull);
424 }
425 }
426
427 m_gpr_arm[offset / sizeof(uint32_t)] = reg_value;
428 return WriteGPR();
429}
430
431Status NativeRegisterContextLinux_arm::ReadGPR() {
432#ifdef __arm__
434#else // __aarch64__
435 struct iovec ioVec;
436 ioVec.iov_base = GetGPRBuffer();
437 ioVec.iov_len = GetGPRSize();
438
439 return ReadRegisterSet(&ioVec, GetGPRSize(), NT_PRSTATUS);
440#endif // __arm__
441}
442
443Status NativeRegisterContextLinux_arm::WriteGPR() {
444#ifdef __arm__
446#else // __aarch64__
447 struct iovec ioVec;
448 ioVec.iov_base = GetGPRBuffer();
449 ioVec.iov_len = GetGPRSize();
450
451 return WriteRegisterSet(&ioVec, GetGPRSize(), NT_PRSTATUS);
452#endif // __arm__
453}
454
455Status NativeRegisterContextLinux_arm::ReadFPR() {
456#ifdef __arm__
457 return NativeProcessLinux::PtraceWrapper(PTRACE_GETVFPREGS, m_thread.GetID(),
458 nullptr, GetFPRBuffer(),
459 GetFPRSize());
460#else // __aarch64__
461 struct iovec ioVec;
462 ioVec.iov_base = GetFPRBuffer();
463 ioVec.iov_len = GetFPRSize();
464
465 return ReadRegisterSet(&ioVec, GetFPRSize(), NT_ARM_VFP);
466#endif // __arm__
467}
468
469Status NativeRegisterContextLinux_arm::WriteFPR() {
470#ifdef __arm__
471 return NativeProcessLinux::PtraceWrapper(PTRACE_SETVFPREGS, m_thread.GetID(),
472 nullptr, GetFPRBuffer(),
473 GetFPRSize());
474#else // __aarch64__
475 struct iovec ioVec;
476 ioVec.iov_base = GetFPRBuffer();
477 ioVec.iov_len = GetFPRSize();
478
479 return WriteRegisterSet(&ioVec, GetFPRSize(), NT_ARM_VFP);
480#endif // __arm__
481}
482
483#endif // defined(__arm__) || defined(__arm64__) || defined(__aarch64__)
static llvm::raw_ostream & error(Stream &strm)
#define REG_CONTEXT_SIZE
size_t GetRegisterSetCount() const override
A subclass of DataBuffer that stores a data buffer on the heap.
void SetUInt64(uint64_t uint, Type t=eTypeUInt64)
void SetUInt16(uint16_t uint)
uint64_t GetAsUInt64(uint64_t fail_value=UINT64_MAX, bool *success_ptr=nullptr) const
void SetBytes(const void *bytes, size_t length, lldb::ByteOrder byte_order)
const void * GetBytes() const
void SetType(RegisterValue::Type type)
uint32_t GetAsUInt32(uint32_t fail_value=UINT32_MAX, bool *success_ptr=nullptr) const
void SetUInt32(uint32_t uint, Type t=eTypeUInt32)
static Status FromErrorStringWithFormat(const char *format,...) __attribute__((format(printf
Definition Status.cpp:106
static Status FromErrorString(const char *str)
Definition Status.h:141
static Status PtraceWrapper(int req, lldb::pid_t pid, void *addr=nullptr, void *data=nullptr, size_t data_size=0, long *result=nullptr)
}
static std::unique_ptr< NativeRegisterContextLinux > CreateHostNativeRegisterContextLinux(const ArchSpec &target_arch, NativeThreadLinux &native_thread)
static llvm::Expected< ArchSpec > DetermineArchitecture(lldb::tid_t tid)
#define LLDB_INVALID_REGNUM
Status WriteHardwareDebugRegs(int hwbType, ::pid_t tid, uint32_t max_supported, const std::array< NativeRegisterContextDBReg::DREG, 16 > &regs)
Status ReadHardwareDebugInfo(::pid_t tid, uint32_t &max_hwp_supported, uint32_t &max_hbp_supported)
A class that represents a running process on the host machine.
std::shared_ptr< lldb_private::DataBuffer > DataBufferSP
std::shared_ptr< lldb_private::WritableDataBuffer > WritableDataBufferSP
uint64_t addr_t
Definition lldb-types.h:80
uint64_t tid_t
Definition lldb-types.h:84
@ eRegisterKindLLDB
lldb's internal register numbers
Every register is described in detail including its name, alternate name (optional),...
uint32_t byte_offset
The byte offset in the register context data where this register's value is found.
uint32_t byte_size
Size in bytes of the register.
uint32_t kinds[lldb::kNumRegisterKinds]
Holds all of the various register numbers for all register kinds.
const char * name
Name of this register, can't be NULL.
uint32_t * invalidate_regs
List of registers (terminated with LLDB_INVALID_REGNUM).
Registers are grouped into register sets.