18 #include "llvm/BinaryFormat/Dwarf.h"
19 #include "llvm/DebugInfo/CodeView/TypeDeserializer.h"
20 #include "llvm/DebugInfo/CodeView/TypeIndex.h"
21 #include "llvm/DebugInfo/PDB/Native/TpiStream.h"
22 #include "llvm/Support/Endian.h"
35 if (register_id == llvm::codeview::RegisterId::VFRAME)
42 llvm::codeview::RegisterId register_id,
55 case SimpleTypeKind::Int128:
56 case SimpleTypeKind::Int64:
57 case SimpleTypeKind::Int64Quad:
58 case SimpleTypeKind::Int32:
59 case SimpleTypeKind::Int32Long:
60 case SimpleTypeKind::Int16:
61 case SimpleTypeKind::Int16Short:
62 case SimpleTypeKind::Float128:
63 case SimpleTypeKind::Float80:
64 case SimpleTypeKind::Float64:
65 case SimpleTypeKind::Float32:
66 case SimpleTypeKind::Float16:
67 case SimpleTypeKind::NarrowCharacter:
68 case SimpleTypeKind::SignedCharacter:
69 case SimpleTypeKind::SByte:
79 SimpleTypeKind stk = ti.getSimpleKind();
83 CVType cvt = tpi.getType(ti);
87 llvm::cantFail(TypeDeserializer::deserializeAs<ModifierRecord>(cvt, mfr));
92 llvm::cantFail(TypeDeserializer::deserializeAs<PointerRecord>(cvt, pr));
97 llvm::cantFail(TypeDeserializer::deserializeAs<EnumRecord>(cvt, er));
101 assert(
false &&
"Type is not integral!");
106 template <
typename StreamWriter>
108 StreamWriter &&writer) {
109 const ArchSpec &architecture = module->GetArchitecture();
119 if (!writer(stream, register_kind))
122 DataBufferSP buffer =
123 std::make_shared<DataBufferHeap>(stream.
GetData(), stream.
GetSize());
124 DataExtractor extractor(buffer, byte_order, address_size, byte_size);
132 llvm::codeview::RegisterId reg, llvm::Optional<int32_t> relative_offset,
133 lldb::ModuleSP module) {
137 module->GetArchitecture().GetMachine(), reg, register_kind);
142 llvm::dwarf::LocationAtom base = relative_offset
143 ? llvm::dwarf::DW_OP_bregx
144 : llvm::dwarf::DW_OP_regx;
148 llvm::dwarf::LocationAtom base = relative_offset
149 ? llvm::dwarf::DW_OP_breg0
150 : llvm::dwarf::DW_OP_reg0;
151 stream.
PutHex8(base + reg_num);
162 llvm::codeview::RegisterId reg, lldb::ModuleSP module) {
167 llvm::codeview::RegisterId reg, int32_t offset, lldb::ModuleSP module) {
172 llvm::StringRef program, llvm::Triple::ArchType arch_type,
Stream &stream) {
179 llvm::StringRef fpo_program, int32_t offset, lldb::ModuleSP module) {
182 const ArchSpec &architecture = module->GetArchitecture();
188 stream.
PutHex8(llvm::dwarf::DW_OP_consts);
190 stream.
PutHex8(llvm::dwarf::DW_OP_plus);
205 stream.
PutHex8(llvm::dwarf::DW_OP_addr);
207 SectionList *section_list = module->GetSectionList();
208 assert(section_list);
214 stream.
PutMaxHex64(section_ptr->GetFileAddress() + offset,
222 TypeIndex underlying_ti, TpiStream &tpi,
const llvm::APSInt &constant,
224 const ArchSpec &architecture = module->GetArchitecture();
228 bool is_signed =
false;
232 llvm::support::little64_t I;
233 llvm::support::ulittle64_t U;
236 std::shared_ptr<DataBufferHeap> buffer = std::make_shared<DataBufferHeap>();
237 buffer->SetByteSize(size);
239 llvm::ArrayRef<uint8_t> bytes;
241 Value.I = constant.getSExtValue();
243 Value.U = constant.getZExtValue();
246 bytes = llvm::makeArrayRef(
reinterpret_cast<const uint8_t *
>(&
Value), 8)
248 buffer->CopyData(bytes.data(), size);
255 std::map<uint64_t, std::pair<RegisterId, uint32_t>> &members_info,
256 lldb::ModuleSP module) {
259 for (
auto pair : members_info) {
260 std::pair<RegisterId, uint32_t> member_info = pair.second;
261 if (member_info.first != llvm::codeview::RegisterId::NONE) {
263 GetRegisterNumber(module->GetArchitecture().GetMachine(),
264 member_info.first, register_kind);
265 if (reg_num == LLDB_INVALID_REGNUM)
268 stream.PutHex8(llvm::dwarf::DW_OP_regx);
269 stream.PutULEB128(reg_num);
271 stream.PutHex8(llvm::dwarf::DW_OP_reg0 + reg_num);
274 stream.
PutHex8(llvm::dwarf::DW_OP_piece);