EmulateInstructionARM64.cpp File Reference

#include "EmulateInstructionARM64.h"
#include "lldb/Core/Address.h"
#include "lldb/Core/PluginManager.h"
#include "lldb/Symbol/UnwindPlan.h"
#include "lldb/Utility/ArchSpec.h"
#include "lldb/Utility/RegisterValue.h"
#include "lldb/Utility/Stream.h"
#include "llvm/Support/CheckedArithmetic.h"
#include "Plugins/Process/Utility/ARMDefines.h"
#include "Plugins/Process/Utility/ARMUtils.h"
#include "Plugins/Process/Utility/lldb-arm64-register-enums.h"
#include <algorithm>
#include <cstdlib>
#include <optional>
#include "Plugins/Process/Utility/RegisterInfos_arm64.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/Support/MathExtras.h"
#include "Plugins/Process/Utility/InstructionUtils.h"

Go to the source code of this file.

Macros
#define	GPR_OFFSET(idx)   ((idx)*8)
#define	GPR_OFFSET_NAME(reg)   0
#define	FPU_OFFSET(idx)   ((idx)*16)
#define	FPU_OFFSET_NAME(reg)   0
#define	EXC_OFFSET_NAME(reg)   0
#define	DBG_OFFSET_NAME(reg)   0
#define	DBG_OFFSET_NAME(reg)   0
#define	DEFINE_DBG(re, y)
#define	DECLARE_REGISTER_INFOS_ARM64_STRUCT
#define	No_VFP   0
#define	VFPv1   (1u << 1)
#define	VFPv2   (1u << 2)
#define	VFPv3   (1u << 3)
#define	AdvancedSIMD   (1u << 4)
#define	VFPv1_ABOVE   (VFPv1 | VFPv2 | VFPv3 | AdvancedSIMD)
#define	VFPv2_ABOVE   (VFPv2 | VFPv3 | AdvancedSIMD)
#define	VFPv2v3   (VFPv2 | VFPv3)
#define	UInt(x)   ((uint64_t)x)
#define	SInt(x)   ((int64_t)x)
#define	bit   bool
#define	boolean   bool
#define	integer   int64_t

Functions
static std::optional< RegisterInfo >	LLDBTableGetRegisterInfo (uint32_t reg_num)
static bool	IsZero (uint64_t x)
static uint64_t	NOT (uint64_t x)
static uint64_t	LSL (uint64_t x, integer shift)
EmulateInstructionARM64::ConstraintType	ConstrainUnpredictable (EmulateInstructionARM64::Unpredictable which)

Macro Definition Documentation

AdvancedSIMD

#define AdvancedSIMD   (1u << 4)

Definition at line 65 of file EmulateInstructionARM64.cpp.

bit

#define bit   bool

Definition at line 73 of file EmulateInstructionARM64.cpp.

boolean

#define boolean   bool

Definition at line 74 of file EmulateInstructionARM64.cpp.

DBG_OFFSET_NAME [1/2]

#define DBG_OFFSET_NAME

(

reg

)

0

Definition at line 34 of file EmulateInstructionARM64.cpp.

DBG_OFFSET_NAME [2/2]

#define DBG_OFFSET_NAME

(

reg

)

0

Definition at line 34 of file EmulateInstructionARM64.cpp.

DECLARE_REGISTER_INFOS_ARM64_STRUCT

#define DECLARE_REGISTER_INFOS_ARM64_STRUCT

Definition at line 41 of file EmulateInstructionARM64.cpp.

DEFINE_DBG

#define DEFINE_DBG	(		re,
			y
	)

Value:

  "na", nullptr, 8, 0, lldb::eEncodingUint, lldb::eFormatHex,                  \
      {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,          \
       LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM},                              \
      nullptr, nullptr, nullptr

Definition at line 35 of file EmulateInstructionARM64.cpp.

EXC_OFFSET_NAME

#define EXC_OFFSET_NAME

(

reg

)

0

Definition at line 32 of file EmulateInstructionARM64.cpp.

FPU_OFFSET

#define FPU_OFFSET

(

idx

)

((idx)*16)

Definition at line 30 of file EmulateInstructionARM64.cpp.

FPU_OFFSET_NAME

#define FPU_OFFSET_NAME

(

reg

)

0

Definition at line 31 of file EmulateInstructionARM64.cpp.

GPR_OFFSET

#define GPR_OFFSET

(

idx

)

((idx)*8)

Definition at line 28 of file EmulateInstructionARM64.cpp.

GPR_OFFSET_NAME

#define GPR_OFFSET_NAME

(

reg

)

0

Definition at line 29 of file EmulateInstructionARM64.cpp.

integer

#define integer   int64_t

Definition at line 75 of file EmulateInstructionARM64.cpp.

No_VFP

#define No_VFP   0

Definition at line 61 of file EmulateInstructionARM64.cpp.

SInt

#define SInt

(

x

)

((int64_t)x)

Definition at line 72 of file EmulateInstructionARM64.cpp.

UInt

#define UInt

(

x

)

((uint64_t)x)

Definition at line 71 of file EmulateInstructionARM64.cpp.

VFPv1

#define VFPv1   (1u << 1)

Definition at line 62 of file EmulateInstructionARM64.cpp.

VFPv1_ABOVE

#define VFPv1_ABOVE   (VFPv1 | VFPv2 | VFPv3 | AdvancedSIMD)

Definition at line 67 of file EmulateInstructionARM64.cpp.

VFPv2

#define VFPv2   (1u << 2)

Definition at line 63 of file EmulateInstructionARM64.cpp.

VFPv2_ABOVE

#define VFPv2_ABOVE   (VFPv2 | VFPv3 | AdvancedSIMD)

Definition at line 68 of file EmulateInstructionARM64.cpp.

VFPv2v3

#define VFPv2v3   (VFPv2 | VFPv3)

Definition at line 69 of file EmulateInstructionARM64.cpp.

VFPv3

#define VFPv3   (1u << 3)

Definition at line 64 of file EmulateInstructionARM64.cpp.

Function Documentation

ConstrainUnpredictable()

EmulateInstructionARM64::ConstraintType ConstrainUnpredictable

(

EmulateInstructionARM64::Unpredictable

which

)

Definition at line 94 of file EmulateInstructionARM64.cpp.

References EmulateInstructionARM64::Constraint_UNKNOWN, EmulateInstructionARM64::Unpredictable_LDPOVERLAP, and EmulateInstructionARM64::Unpredictable_WBOVERLAP.

Referenced by EmulateInstructionARM64::EmulateLDPSTP().

IsZero()

static bool IsZero ( uint64_t  x )

inlinestatic

Definition at line 77 of file EmulateInstructionARM64.cpp.

Referenced by EmulateInstructionARM64::AddWithCarry(), lldb_private::EmulateInstructionARM::EmulateCB(), and EmulateInstructionARM64::EmulateCBZ().

LLDBTableGetRegisterInfo()

static std::optional< RegisterInfo > LLDBTableGetRegisterInfo ( uint32_t  reg_num )

static

Definition at line 55 of file EmulateInstructionARM64.cpp.

Referenced by EmulateInstructionARM64::GetRegisterInfo(), and lldb_private::EmulateInstructionPPC64::GetRegisterInfo().

LSL()

static uint64_t LSL ( uint64_t  x, integer  shift  )

inlinestatic

Definition at line 84 of file EmulateInstructionARM64.cpp.

Referenced by EmulateInstructionARM64::EmulateLDPSTP(), and EmulateInstructionARM64::EmulateLDRSTRImm().

NOT()

static uint64_t NOT ( uint64_t  x )

inlinestatic

Definition at line 79 of file EmulateInstructionARM64.cpp.

Referenced by EmulateInstructionARM64::EmulateADDSUBImm(), lldb_private::EmulateInstructionARM::EmulateBICImm(), lldb_private::EmulateInstructionARM::EmulateBICReg(), lldb_private::EmulateInstructionARM::EmulateCMPImm(), lldb_private::EmulateInstructionARM::EmulateCMPReg(), lldb_private::EmulateInstructionARM::EmulateMVNImm(), lldb_private::EmulateInstructionARM::EmulateMVNReg(), lldb_private::EmulateInstructionARM::EmulateRSBImm(), lldb_private::EmulateInstructionARM::EmulateRSBReg(), lldb_private::EmulateInstructionARM::EmulateRSCImm(), lldb_private::EmulateInstructionARM::EmulateRSCReg(), lldb_private::EmulateInstructionARM::EmulateSBCImm(), lldb_private::EmulateInstructionARM::EmulateSBCReg(), lldb_private::EmulateInstructionARM::EmulateSUBImmARM(), lldb_private::EmulateInstructionARM::EmulateSUBImmThumb(), lldb_private::EmulateInstructionARM::EmulateSUBIPSPImm(), lldb_private::EmulateInstructionARM::EmulateSUBR7IPImm(), lldb_private::EmulateInstructionARM::EmulateSUBReg(), lldb_private::EmulateInstructionARM::EmulateSUBSPcLrEtc(), lldb_private::EmulateInstructionARM::EmulateSUBSPImm(), and lldb_private::EmulateInstructionARM::EmulateSUBSPReg().