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NativeRegisterContextLinux_x86_64.cpp
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1//===-- NativeRegisterContextLinux_x86_64.cpp -----------------------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8
9#if defined(__i386__) || defined(__x86_64__)
10
15#include "lldb/Host/HostInfo.h"
17#include "lldb/Utility/Log.h"
19#include "lldb/Utility/Status.h"
20#include <cpuid.h>
21#include <linux/elf.h>
22#include <optional>
23
24// Newer toolchains define __get_cpuid_count in cpuid.h, but some
25// older-but-still-supported ones (e.g. gcc 5.4.0) don't, so we
26// define it locally here, following the definition in clang/lib/Headers.
27static inline int get_cpuid_count(unsigned int __leaf,
28 unsigned int __subleaf,
29 unsigned int *__eax, unsigned int *__ebx,
30 unsigned int *__ecx, unsigned int *__edx)
31{
32 unsigned int __max_leaf = __get_cpuid_max(__leaf & 0x80000000, nullptr);
33
34 if (__max_leaf == 0 || __max_leaf < __leaf)
35 return 0;
36
37 __cpuid_count(__leaf, __subleaf, *__eax, *__ebx, *__ecx, *__edx);
38 return 1;
39}
40
41using namespace lldb_private;
42using namespace lldb_private::process_linux;
43
44// x86 32-bit general purpose registers.
45static const uint32_t g_gpr_regnums_i386[] = {
54 LLDB_INVALID_REGNUM // register sets need to end with this flag
55};
56static_assert((sizeof(g_gpr_regnums_i386) / sizeof(g_gpr_regnums_i386[0])) -
57 1 ==
58 k_num_gpr_registers_i386,
59 "g_gpr_regnums_i386 has wrong number of register infos");
60
61// x86 32-bit floating point registers.
62static const uint32_t g_fpu_regnums_i386[] = {
72 LLDB_INVALID_REGNUM // register sets need to end with this flag
73};
74static_assert((sizeof(g_fpu_regnums_i386) / sizeof(g_fpu_regnums_i386[0])) -
75 1 ==
76 k_num_fpr_registers_i386,
77 "g_fpu_regnums_i386 has wrong number of register infos");
78
79// x86 32-bit AVX registers.
80static const uint32_t g_avx_regnums_i386[] = {
83 LLDB_INVALID_REGNUM // register sets need to end with this flag
84};
85static_assert((sizeof(g_avx_regnums_i386) / sizeof(g_avx_regnums_i386[0])) -
86 1 ==
87 k_num_avx_registers_i386,
88 " g_avx_regnums_i386 has wrong number of register infos");
89
90// x64 32-bit MPX registers.
91static const uint32_t g_mpx_regnums_i386[] = {
94 LLDB_INVALID_REGNUM // register sets need to end with this flag
95};
96static_assert((sizeof(g_mpx_regnums_i386) / sizeof(g_mpx_regnums_i386[0])) -
97 1 ==
98 k_num_mpx_registers_i386,
99 "g_mpx_regnums_x86_64 has wrong number of register infos");
100
101// x86 64-bit general purpose registers.
102static const uint32_t g_gpr_regnums_x86_64[] = {
103 x86_64_with_base::lldb_rax, x86_64_with_base::lldb_rbx, x86_64_with_base::lldb_rcx, x86_64_with_base::lldb_rdx,
104 x86_64_with_base::lldb_rdi, x86_64_with_base::lldb_rsi, x86_64_with_base::lldb_rbp, x86_64_with_base::lldb_rsp,
105 x86_64_with_base::lldb_r8, x86_64_with_base::lldb_r9, x86_64_with_base::lldb_r10, x86_64_with_base::lldb_r11,
106 x86_64_with_base::lldb_r12, x86_64_with_base::lldb_r13, x86_64_with_base::lldb_r14, x86_64_with_base::lldb_r15,
107 x86_64_with_base::lldb_rip, x86_64_with_base::lldb_rflags, x86_64_with_base::lldb_cs, x86_64_with_base::lldb_fs,
108 x86_64_with_base::lldb_gs, x86_64_with_base::lldb_ss, x86_64_with_base::lldb_fs_base, x86_64_with_base::lldb_gs_base,
109 x86_64_with_base::lldb_ds, x86_64_with_base::lldb_es,
110 x86_64_with_base::lldb_eax, x86_64_with_base::lldb_ebx, x86_64_with_base::lldb_ecx, x86_64_with_base::lldb_edx,
111 x86_64_with_base::lldb_edi, x86_64_with_base::lldb_esi, x86_64_with_base::lldb_ebp, x86_64_with_base::lldb_esp,
112 x86_64_with_base::lldb_r8d, // Low 32 bits or r8
113 x86_64_with_base::lldb_r9d, // Low 32 bits or r9
114 x86_64_with_base::lldb_r10d, // Low 32 bits or r10
115 x86_64_with_base::lldb_r11d, // Low 32 bits or r11
116 x86_64_with_base::lldb_r12d, // Low 32 bits or r12
117 x86_64_with_base::lldb_r13d, // Low 32 bits or r13
118 x86_64_with_base::lldb_r14d, // Low 32 bits or r14
119 x86_64_with_base::lldb_r15d, // Low 32 bits or r15
120 x86_64_with_base::lldb_ax, x86_64_with_base::lldb_bx, x86_64_with_base::lldb_cx, x86_64_with_base::lldb_dx,
121 x86_64_with_base::lldb_di, x86_64_with_base::lldb_si, x86_64_with_base::lldb_bp, x86_64_with_base::lldb_sp,
122 x86_64_with_base::lldb_r8w, // Low 16 bits or r8
123 x86_64_with_base::lldb_r9w, // Low 16 bits or r9
124 x86_64_with_base::lldb_r10w, // Low 16 bits or r10
125 x86_64_with_base::lldb_r11w, // Low 16 bits or r11
126 x86_64_with_base::lldb_r12w, // Low 16 bits or r12
127 x86_64_with_base::lldb_r13w, // Low 16 bits or r13
128 x86_64_with_base::lldb_r14w, // Low 16 bits or r14
129 x86_64_with_base::lldb_r15w, // Low 16 bits or r15
130 x86_64_with_base::lldb_ah, x86_64_with_base::lldb_bh, x86_64_with_base::lldb_ch, x86_64_with_base::lldb_dh,
131 x86_64_with_base::lldb_al, x86_64_with_base::lldb_bl, x86_64_with_base::lldb_cl, x86_64_with_base::lldb_dl,
132 x86_64_with_base::lldb_dil, x86_64_with_base::lldb_sil, x86_64_with_base::lldb_bpl, x86_64_with_base::lldb_spl,
133 x86_64_with_base::lldb_r8l, // Low 8 bits or r8
134 x86_64_with_base::lldb_r9l, // Low 8 bits or r9
135 x86_64_with_base::lldb_r10l, // Low 8 bits or r10
136 x86_64_with_base::lldb_r11l, // Low 8 bits or r11
137 x86_64_with_base::lldb_r12l, // Low 8 bits or r12
138 x86_64_with_base::lldb_r13l, // Low 8 bits or r13
139 x86_64_with_base::lldb_r14l, // Low 8 bits or r14
140 x86_64_with_base::lldb_r15l, // Low 8 bits or r15
141 LLDB_INVALID_REGNUM // register sets need to end with this flag
142};
143static_assert((sizeof(g_gpr_regnums_x86_64) / sizeof(g_gpr_regnums_x86_64[0])) -
144 1 ==
145 x86_64_with_base::k_num_gpr_registers,
146 "g_gpr_regnums_x86_64 has wrong number of register infos");
147
148// x86 64-bit floating point registers.
149static const uint32_t g_fpu_regnums_x86_64[] = {
150 x86_64_with_base::lldb_fctrl, x86_64_with_base::lldb_fstat, x86_64_with_base::lldb_ftag,
151 x86_64_with_base::lldb_fop, x86_64_with_base::lldb_fiseg, x86_64_with_base::lldb_fioff,
152 x86_64_with_base::lldb_fip, x86_64_with_base::lldb_foseg, x86_64_with_base::lldb_fooff,
153 x86_64_with_base::lldb_fdp, x86_64_with_base::lldb_mxcsr, x86_64_with_base::lldb_mxcsrmask,
154 x86_64_with_base::lldb_st0, x86_64_with_base::lldb_st1, x86_64_with_base::lldb_st2,
155 x86_64_with_base::lldb_st3, x86_64_with_base::lldb_st4, x86_64_with_base::lldb_st5,
156 x86_64_with_base::lldb_st6, x86_64_with_base::lldb_st7, x86_64_with_base::lldb_mm0,
157 x86_64_with_base::lldb_mm1, x86_64_with_base::lldb_mm2, x86_64_with_base::lldb_mm3,
158 x86_64_with_base::lldb_mm4, x86_64_with_base::lldb_mm5, x86_64_with_base::lldb_mm6,
159 x86_64_with_base::lldb_mm7, x86_64_with_base::lldb_xmm0, x86_64_with_base::lldb_xmm1,
160 x86_64_with_base::lldb_xmm2, x86_64_with_base::lldb_xmm3, x86_64_with_base::lldb_xmm4,
161 x86_64_with_base::lldb_xmm5, x86_64_with_base::lldb_xmm6, x86_64_with_base::lldb_xmm7,
162 x86_64_with_base::lldb_xmm8, x86_64_with_base::lldb_xmm9, x86_64_with_base::lldb_xmm10,
163 x86_64_with_base::lldb_xmm11, x86_64_with_base::lldb_xmm12, x86_64_with_base::lldb_xmm13,
164 x86_64_with_base::lldb_xmm14, x86_64_with_base::lldb_xmm15,
165 LLDB_INVALID_REGNUM // register sets need to end with this flag
166};
167static_assert((sizeof(g_fpu_regnums_x86_64) / sizeof(g_fpu_regnums_x86_64[0])) -
168 1 ==
169 x86_64_with_base::k_num_fpr_registers,
170 "g_fpu_regnums_x86_64 has wrong number of register infos");
171
172// x86 64-bit AVX registers.
173static const uint32_t g_avx_regnums_x86_64[] = {
174 x86_64_with_base::lldb_ymm0, x86_64_with_base::lldb_ymm1, x86_64_with_base::lldb_ymm2, x86_64_with_base::lldb_ymm3,
175 x86_64_with_base::lldb_ymm4, x86_64_with_base::lldb_ymm5, x86_64_with_base::lldb_ymm6, x86_64_with_base::lldb_ymm7,
176 x86_64_with_base::lldb_ymm8, x86_64_with_base::lldb_ymm9, x86_64_with_base::lldb_ymm10, x86_64_with_base::lldb_ymm11,
177 x86_64_with_base::lldb_ymm12, x86_64_with_base::lldb_ymm13, x86_64_with_base::lldb_ymm14, x86_64_with_base::lldb_ymm15,
178 LLDB_INVALID_REGNUM // register sets need to end with this flag
179};
180static_assert((sizeof(g_avx_regnums_x86_64) / sizeof(g_avx_regnums_x86_64[0])) -
181 1 ==
182 x86_64_with_base::k_num_avx_registers,
183 "g_avx_regnums_x86_64 has wrong number of register infos");
184
185// x86 64-bit MPX registers.
186static const uint32_t g_mpx_regnums_x86_64[] = {
187 x86_64_with_base::lldb_bnd0, x86_64_with_base::lldb_bnd1, x86_64_with_base::lldb_bnd2,
188 x86_64_with_base::lldb_bnd3, x86_64_with_base::lldb_bndcfgu, x86_64_with_base::lldb_bndstatus,
189 LLDB_INVALID_REGNUM // register sets need to end with this flag
190};
191static_assert((sizeof(g_mpx_regnums_x86_64) / sizeof(g_mpx_regnums_x86_64[0])) -
192 1 ==
193 x86_64_with_base::k_num_mpx_registers,
194 "g_mpx_regnums_x86_64 has wrong number of register infos");
195
196// Number of register sets provided by this context.
197constexpr unsigned k_num_extended_register_sets = 2, k_num_register_sets = 4;
198
199// Register sets for x86 32-bit.
201 {"General Purpose Registers", "gpr", k_num_gpr_registers_i386,
203 {"Floating Point Registers", "fpu", k_num_fpr_registers_i386,
204 g_fpu_regnums_i386},
205 {"Advanced Vector Extensions", "avx", k_num_avx_registers_i386,
207 { "Memory Protection Extensions", "mpx", k_num_mpx_registers_i386,
208 g_mpx_regnums_i386}};
209
210// Register sets for x86 64-bit.
212 {"General Purpose Registers", "gpr", x86_64_with_base::k_num_gpr_registers,
214 {"Floating Point Registers", "fpu", x86_64_with_base::k_num_fpr_registers,
215 g_fpu_regnums_x86_64},
216 {"Advanced Vector Extensions", "avx", x86_64_with_base::k_num_avx_registers,
218 { "Memory Protection Extensions", "mpx", x86_64_with_base::k_num_mpx_registers,
219 g_mpx_regnums_x86_64}};
220
221#define REG_CONTEXT_SIZE (GetRegisterInfoInterface().GetGPRSize() + sizeof(FPR))
222
223// Required ptrace defines.
224
225// Support ptrace extensions even when compiled without required kernel support
226#ifndef NT_X86_XSTATE
227#define NT_X86_XSTATE 0x202
228#endif
229#ifndef NT_PRXFPREG
230#define NT_PRXFPREG 0x46e62b7f
231#endif
232
233// On x86_64 NT_PRFPREG is used to access the FXSAVE area. On i386, we need to
234// use NT_PRXFPREG.
235static inline unsigned int fxsr_regset(const ArchSpec &arch) {
236 return arch.GetAddressByteSize() == 8 ? NT_PRFPREG : NT_PRXFPREG;
237}
238
239// Required MPX define.
240
241// Support MPX extensions also if compiled with compiler without MPX support.
242#ifndef bit_MPX
243#define bit_MPX 0x4000
244#endif
245
246// XCR0 extended register sets masks.
247#define mask_XSTATE_AVX (1ULL << 2)
248#define mask_XSTATE_BNDREGS (1ULL << 3)
249#define mask_XSTATE_BNDCFG (1ULL << 4)
250#define mask_XSTATE_MPX (mask_XSTATE_BNDREGS | mask_XSTATE_BNDCFG)
251
252std::unique_ptr<NativeRegisterContextLinux>
253NativeRegisterContextLinux::CreateHostNativeRegisterContextLinux(
254 const ArchSpec &target_arch, NativeThreadLinux &native_thread) {
255 return std::unique_ptr<NativeRegisterContextLinux>(
256 new NativeRegisterContextLinux_x86_64(target_arch, native_thread));
257}
258
259llvm::Expected<ArchSpec>
260NativeRegisterContextLinux::DetermineArchitecture(lldb::tid_t tid) {
261 return DetermineArchitectureViaGPR(
263}
264
265// NativeRegisterContextLinux_x86_64 members.
266
267static std::unique_ptr<RegisterContextLinux_x86>
268CreateRegisterInfoInterface(const ArchSpec &target_arch) {
269 if (HostInfo::GetArchitecture().GetAddressByteSize() == 4) {
270 // 32-bit hosts run with a RegisterContextLinux_i386 context.
271 return std::make_unique<RegisterContextLinux_i386>(target_arch);
272 } else {
273 assert((HostInfo::GetArchitecture().GetAddressByteSize() == 8) &&
274 "Register setting path assumes this is a 64-bit host");
275 // X86_64 hosts know how to work with 64-bit and 32-bit EXEs using the
276 // x86_64 register context.
277 return std::make_unique<RegisterContextLinux_x86_64>(target_arch);
278 }
279}
280
281// Return the size of the XSTATE area supported on this cpu. It is necessary to
282// allocate the full size of the area even if we do not use/recognise all of it
283// because ptrace(PTRACE_SETREGSET, NT_X86_XSTATE) will refuse to write to it if
284// we do not pass it a buffer of sufficient size. The size is always at least
285// sizeof(FPR) so that the allocated buffer can be safely cast to FPR*.
286static std::size_t GetXSTATESize() {
287 unsigned int eax, ebx, ecx, edx;
288 // First check whether the XSTATE are is supported at all.
289 if (!__get_cpuid(1, &eax, &ebx, &ecx, &edx) || !(ecx & bit_XSAVE))
290 return sizeof(FPR);
291
292 // Then fetch the maximum size of the area.
293 if (!get_cpuid_count(0x0d, 0, &eax, &ebx, &ecx, &edx))
294 return sizeof(FPR);
295 return std::max<std::size_t>(ecx, sizeof(FPR));
296}
297
298NativeRegisterContextLinux_x86_64::NativeRegisterContextLinux_x86_64(
299 const ArchSpec &target_arch, NativeThreadProtocol &native_thread)
301 native_thread, CreateRegisterInfoInterface(target_arch).release()),
302 NativeRegisterContextLinux(native_thread),
303 NativeRegisterContextDBReg_x86(native_thread),
304 m_xstate_type(XStateType::Invalid), m_ymm_set(), m_mpx_set(),
305 m_reg_info(), m_gpr_x86_64() {
306 // Set up data about ranges of valid registers.
307 switch (target_arch.GetMachine()) {
308 case llvm::Triple::x86:
309 m_reg_info.num_registers = k_num_registers_i386;
310 m_reg_info.num_gpr_registers = k_num_gpr_registers_i386;
311 m_reg_info.num_fpr_registers = k_num_fpr_registers_i386;
312 m_reg_info.num_avx_registers = k_num_avx_registers_i386;
313 m_reg_info.num_mpx_registers = k_num_mpx_registers_i386;
314 m_reg_info.last_gpr = k_last_gpr_i386;
315 m_reg_info.first_fpr = k_first_fpr_i386;
316 m_reg_info.last_fpr = k_last_fpr_i386;
317 m_reg_info.first_st = lldb_st0_i386;
318 m_reg_info.last_st = lldb_st7_i386;
319 m_reg_info.first_mm = lldb_mm0_i386;
320 m_reg_info.last_mm = lldb_mm7_i386;
321 m_reg_info.first_xmm = lldb_xmm0_i386;
322 m_reg_info.last_xmm = lldb_xmm7_i386;
323 m_reg_info.first_ymm = lldb_ymm0_i386;
324 m_reg_info.last_ymm = lldb_ymm7_i386;
325 m_reg_info.first_mpxr = lldb_bnd0_i386;
326 m_reg_info.last_mpxr = lldb_bnd3_i386;
327 m_reg_info.first_mpxc = lldb_bndcfgu_i386;
328 m_reg_info.last_mpxc = lldb_bndstatus_i386;
329 m_reg_info.first_dr = lldb_dr0_i386;
330 m_reg_info.last_dr = lldb_dr7_i386;
331 m_reg_info.gpr_flags = lldb_eflags_i386;
332 break;
333 case llvm::Triple::x86_64:
334 m_reg_info.num_registers = x86_64_with_base::k_num_registers;
335 m_reg_info.num_gpr_registers = x86_64_with_base::k_num_gpr_registers;
336 m_reg_info.num_fpr_registers = x86_64_with_base::k_num_fpr_registers;
337 m_reg_info.num_avx_registers = x86_64_with_base::k_num_avx_registers;
338 m_reg_info.num_mpx_registers = x86_64_with_base::k_num_mpx_registers;
339 m_reg_info.last_gpr = x86_64_with_base::k_last_gpr;
340 m_reg_info.first_fpr = x86_64_with_base::k_first_fpr;
341 m_reg_info.last_fpr = x86_64_with_base::k_last_fpr;
342 m_reg_info.first_st = x86_64_with_base::lldb_st0;
343 m_reg_info.last_st = x86_64_with_base::lldb_st7;
344 m_reg_info.first_mm = x86_64_with_base::lldb_mm0;
345 m_reg_info.last_mm = x86_64_with_base::lldb_mm7;
346 m_reg_info.first_xmm = x86_64_with_base::lldb_xmm0;
347 m_reg_info.last_xmm = x86_64_with_base::lldb_xmm15;
348 m_reg_info.first_ymm = x86_64_with_base::lldb_ymm0;
349 m_reg_info.last_ymm = x86_64_with_base::lldb_ymm15;
350 m_reg_info.first_mpxr = x86_64_with_base::lldb_bnd0;
351 m_reg_info.last_mpxr = x86_64_with_base::lldb_bnd3;
352 m_reg_info.first_mpxc = x86_64_with_base::lldb_bndcfgu;
353 m_reg_info.last_mpxc = x86_64_with_base::lldb_bndstatus;
354 m_reg_info.first_dr = x86_64_with_base::lldb_dr0;
355 m_reg_info.last_dr = x86_64_with_base::lldb_dr7;
356 m_reg_info.gpr_flags = x86_64_with_base::lldb_rflags;
357 break;
358 default:
359 assert(false && "Unhandled target architecture.");
360 break;
361 }
362
363 std::size_t xstate_size = GetXSTATESize();
364 m_xstate.reset(static_cast<FPR *>(std::malloc(xstate_size)));
365 m_iovec.iov_base = m_xstate.get();
366 m_iovec.iov_len = xstate_size;
367
368 // Clear out the FPR state.
369 ::memset(m_xstate.get(), 0, xstate_size);
370
371 // Store byte offset of fctrl (i.e. first register of FPR)
372 const RegisterInfo *reg_info_fctrl = GetRegisterInfoByName("fctrl");
373 m_fctrl_offset_in_userarea = reg_info_fctrl->byte_offset;
374}
375
376// CONSIDER after local and llgs debugging are merged, register set support can
377// be moved into a base x86-64 class with IsRegisterSetAvailable made virtual.
378uint32_t NativeRegisterContextLinux_x86_64::GetRegisterSetCount() const {
379 uint32_t sets = 0;
380 for (uint32_t set_index = 0; set_index < k_num_register_sets; ++set_index) {
381 if (IsRegisterSetAvailable(set_index))
382 ++sets;
383 }
384
385 return sets;
386}
387
388uint32_t NativeRegisterContextLinux_x86_64::GetUserRegisterCount() const {
389 uint32_t count = 0;
390 for (uint32_t set_index = 0; set_index < k_num_register_sets; ++set_index) {
391 const RegisterSet *set = GetRegisterSet(set_index);
392 if (set)
393 count += set->num_registers;
394 }
395 return count;
396}
397
398const RegisterSet *
399NativeRegisterContextLinux_x86_64::GetRegisterSet(uint32_t set_index) const {
400 if (!IsRegisterSetAvailable(set_index))
401 return nullptr;
402
403 switch (GetRegisterInfoInterface().GetTargetArchitecture().GetMachine()) {
404 case llvm::Triple::x86:
405 return &g_reg_sets_i386[set_index];
406 case llvm::Triple::x86_64:
407 return &g_reg_sets_x86_64[set_index];
408 default:
409 assert(false && "Unhandled target architecture.");
410 return nullptr;
411 }
412
413 return nullptr;
414}
415
416Status
417NativeRegisterContextLinux_x86_64::ReadRegister(const RegisterInfo *reg_info,
418 RegisterValue &reg_value) {
420
421 if (!reg_info) {
422 error.SetErrorString("reg_info NULL");
423 return error;
424 }
425
426 const uint32_t reg = reg_info->kinds[lldb::eRegisterKindLLDB];
427 if (reg == LLDB_INVALID_REGNUM) {
428 // This is likely an internal register for lldb use only and should not be
429 // directly queried.
430 error.SetErrorStringWithFormat("register \"%s\" is an internal-only lldb "
431 "register, cannot read directly",
432 reg_info->name);
433 return error;
434 }
435
436 if (IsFPR(reg) || IsAVX(reg) || IsMPX(reg)) {
437 error = ReadFPR();
438 if (error.Fail())
439 return error;
440 } else {
441 uint32_t full_reg = reg;
442 bool is_subreg = reg_info->invalidate_regs &&
443 (reg_info->invalidate_regs[0] != LLDB_INVALID_REGNUM);
444
445 if (is_subreg) {
446 // Read the full aligned 64-bit register.
447 full_reg = reg_info->invalidate_regs[0];
448 }
449
450 error = ReadRegisterRaw(full_reg, reg_value);
451
452 if (error.Success()) {
453 // If our read was not aligned (for ah,bh,ch,dh), shift our returned
454 // value one byte to the right.
455 if (is_subreg && (reg_info->byte_offset & 0x1))
456 reg_value.SetUInt64(reg_value.GetAsUInt64() >> 8);
457
458 // If our return byte size was greater than the return value reg size,
459 // then use the type specified by reg_info rather than the uint64_t
460 // default
461 if (reg_value.GetByteSize() > reg_info->byte_size)
462 reg_value.SetType(*reg_info);
463 }
464 return error;
465 }
466
467 if (reg_info->encoding == lldb::eEncodingVector) {
468 lldb::ByteOrder byte_order = GetByteOrder();
469
470 if (byte_order != lldb::eByteOrderInvalid) {
471 if (reg >= m_reg_info.first_st && reg <= m_reg_info.last_st)
472 reg_value.SetBytes(
473 m_xstate->fxsave.stmm[reg - m_reg_info.first_st].bytes,
474 reg_info->byte_size, byte_order);
475 if (reg >= m_reg_info.first_mm && reg <= m_reg_info.last_mm)
476 reg_value.SetBytes(
477 m_xstate->fxsave.stmm[reg - m_reg_info.first_mm].bytes,
478 reg_info->byte_size, byte_order);
479 if (reg >= m_reg_info.first_xmm && reg <= m_reg_info.last_xmm)
480 reg_value.SetBytes(
481 m_xstate->fxsave.xmm[reg - m_reg_info.first_xmm].bytes,
482 reg_info->byte_size, byte_order);
483 if (reg >= m_reg_info.first_ymm && reg <= m_reg_info.last_ymm) {
484 // Concatenate ymm using the register halves in xmm.bytes and
485 // ymmh.bytes
486 if (CopyXSTATEtoYMM(reg, byte_order))
487 reg_value.SetBytes(m_ymm_set.ymm[reg - m_reg_info.first_ymm].bytes,
488 reg_info->byte_size, byte_order);
489 else {
490 error.SetErrorString("failed to copy ymm register value");
491 return error;
492 }
493 }
494 if (reg >= m_reg_info.first_mpxr && reg <= m_reg_info.last_mpxr) {
495 if (CopyXSTATEtoMPX(reg))
496 reg_value.SetBytes(m_mpx_set.mpxr[reg - m_reg_info.first_mpxr].bytes,
497 reg_info->byte_size, byte_order);
498 else {
499 error.SetErrorString("failed to copy mpx register value");
500 return error;
501 }
502 }
503 if (reg >= m_reg_info.first_mpxc && reg <= m_reg_info.last_mpxc) {
504 if (CopyXSTATEtoMPX(reg))
505 reg_value.SetBytes(m_mpx_set.mpxc[reg - m_reg_info.first_mpxc].bytes,
506 reg_info->byte_size, byte_order);
507 else {
508 error.SetErrorString("failed to copy mpx register value");
509 return error;
510 }
511 }
512
513 if (reg_value.GetType() != RegisterValue::eTypeBytes)
514 error.SetErrorString(
515 "write failed - type was expected to be RegisterValue::eTypeBytes");
516
517 return error;
518 }
519
520 error.SetErrorString("byte order is invalid");
521 return error;
522 }
523
524 // Get pointer to m_xstate->fxsave variable and set the data from it.
525
526 // Byte offsets of all registers are calculated wrt 'UserArea' structure.
527 // However, ReadFPR() reads fpu registers {using ptrace(PTRACE_GETFPREGS,..)}
528 // and stores them in 'm_fpr' (of type FPR structure). To extract values of
529 // fpu registers, m_fpr should be read at byte offsets calculated wrt to FPR
530 // structure.
531
532 // Since, FPR structure is also one of the member of UserArea structure.
533 // byte_offset(fpu wrt FPR) = byte_offset(fpu wrt UserArea) -
534 // byte_offset(fctrl wrt UserArea)
535 assert((reg_info->byte_offset - m_fctrl_offset_in_userarea) < sizeof(FPR));
536 uint8_t *src = (uint8_t *)m_xstate.get() + reg_info->byte_offset -
537 m_fctrl_offset_in_userarea;
538
539 if (src == reinterpret_cast<uint8_t *>(&m_xstate->fxsave.ftag)) {
541 m_xstate->fxsave.ftag, m_xstate->fxsave.fstat, m_xstate->fxsave.stmm));
542 return error;
543 }
544
545 switch (reg_info->byte_size) {
546 case 1:
547 reg_value.SetUInt8(*(uint8_t *)src);
548 break;
549 case 2:
550 reg_value.SetUInt16(*(uint16_t *)src);
551 break;
552 case 4:
553 reg_value.SetUInt32(*(uint32_t *)src);
554 break;
555 case 8:
556 reg_value.SetUInt64(*(uint64_t *)src);
557 break;
558 default:
559 assert(false && "Unhandled data size.");
560 error.SetErrorStringWithFormat("unhandled byte size: %" PRIu32,
561 reg_info->byte_size);
562 break;
563 }
564
565 return error;
566}
567
568void NativeRegisterContextLinux_x86_64::UpdateXSTATEforWrite(
569 uint32_t reg_index) {
570 XSAVE_HDR::XFeature &xstate_bv = m_xstate->xsave.header.xstate_bv;
571 if (IsFPR(reg_index)) {
572 // IsFPR considers both %st and %xmm registers as floating point, but these
573 // map to two features. Set both flags, just in case.
574 xstate_bv |= XSAVE_HDR::XFeature::FP | XSAVE_HDR::XFeature::SSE;
575 } else if (IsAVX(reg_index)) {
576 // Lower bytes of some %ymm registers are shared with %xmm registers.
577 xstate_bv |= XSAVE_HDR::XFeature::YMM | XSAVE_HDR::XFeature::SSE;
578 } else if (IsMPX(reg_index)) {
579 // MPX registers map to two XSAVE features.
580 xstate_bv |= XSAVE_HDR::XFeature::BNDREGS | XSAVE_HDR::XFeature::BNDCSR;
581 }
582}
583
584Status NativeRegisterContextLinux_x86_64::WriteRegister(
585 const RegisterInfo *reg_info, const RegisterValue &reg_value) {
586 assert(reg_info && "reg_info is null");
587
588 const uint32_t reg_index = reg_info->kinds[lldb::eRegisterKindLLDB];
589 if (reg_index == LLDB_INVALID_REGNUM)
590 return Status("no lldb regnum for %s", reg_info && reg_info->name
591 ? reg_info->name
592 : "<unknown register>");
593
594 UpdateXSTATEforWrite(reg_index);
595
596 if (IsGPR(reg_index) || IsDR(reg_index))
597 return WriteRegisterRaw(reg_index, reg_value);
598
599 if (IsFPR(reg_index) || IsAVX(reg_index) || IsMPX(reg_index)) {
600 if (reg_info->encoding == lldb::eEncodingVector) {
601 if (reg_index >= m_reg_info.first_st && reg_index <= m_reg_info.last_st)
602 ::memcpy(m_xstate->fxsave.stmm[reg_index - m_reg_info.first_st].bytes,
603 reg_value.GetBytes(), reg_value.GetByteSize());
604
605 if (reg_index >= m_reg_info.first_mm && reg_index <= m_reg_info.last_mm)
606 ::memcpy(m_xstate->fxsave.stmm[reg_index - m_reg_info.first_mm].bytes,
607 reg_value.GetBytes(), reg_value.GetByteSize());
608
609 if (reg_index >= m_reg_info.first_xmm && reg_index <= m_reg_info.last_xmm)
610 ::memcpy(m_xstate->fxsave.xmm[reg_index - m_reg_info.first_xmm].bytes,
611 reg_value.GetBytes(), reg_value.GetByteSize());
612
613 if (reg_index >= m_reg_info.first_ymm &&
614 reg_index <= m_reg_info.last_ymm) {
615 // Store ymm register content, and split into the register halves in
616 // xmm.bytes and ymmh.bytes
617 ::memcpy(m_ymm_set.ymm[reg_index - m_reg_info.first_ymm].bytes,
618 reg_value.GetBytes(), reg_value.GetByteSize());
619 if (!CopyYMMtoXSTATE(reg_index, GetByteOrder()))
620 return Status("CopyYMMtoXSTATE() failed");
621 }
622
623 if (reg_index >= m_reg_info.first_mpxr &&
624 reg_index <= m_reg_info.last_mpxr) {
625 ::memcpy(m_mpx_set.mpxr[reg_index - m_reg_info.first_mpxr].bytes,
626 reg_value.GetBytes(), reg_value.GetByteSize());
627 if (!CopyMPXtoXSTATE(reg_index))
628 return Status("CopyMPXtoXSTATE() failed");
629 }
630
631 if (reg_index >= m_reg_info.first_mpxc &&
632 reg_index <= m_reg_info.last_mpxc) {
633 ::memcpy(m_mpx_set.mpxc[reg_index - m_reg_info.first_mpxc].bytes,
634 reg_value.GetBytes(), reg_value.GetByteSize());
635 if (!CopyMPXtoXSTATE(reg_index))
636 return Status("CopyMPXtoXSTATE() failed");
637 }
638 } else {
639 // Get pointer to m_xstate->fxsave variable and set the data to it.
640
641 // Byte offsets of all registers are calculated wrt 'UserArea' structure.
642 // However, WriteFPR() takes m_fpr (of type FPR structure) and writes
643 // only fpu registers using ptrace(PTRACE_SETFPREGS,..) API. Hence fpu
644 // registers should be written in m_fpr at byte offsets calculated wrt
645 // FPR structure.
646
647 // Since, FPR structure is also one of the member of UserArea structure.
648 // byte_offset(fpu wrt FPR) = byte_offset(fpu wrt UserArea) -
649 // byte_offset(fctrl wrt UserArea)
650 assert((reg_info->byte_offset - m_fctrl_offset_in_userarea) <
651 sizeof(FPR));
652 uint8_t *dst = (uint8_t *)m_xstate.get() + reg_info->byte_offset -
653 m_fctrl_offset_in_userarea;
654
655 if (dst == reinterpret_cast<uint8_t *>(&m_xstate->fxsave.ftag))
656 m_xstate->fxsave.ftag = FullToAbridgedTagWord(reg_value.GetAsUInt16());
657 else {
658 switch (reg_info->byte_size) {
659 case 1:
660 *(uint8_t *)dst = reg_value.GetAsUInt8();
661 break;
662 case 2:
663 *(uint16_t *)dst = reg_value.GetAsUInt16();
664 break;
665 case 4:
666 *(uint32_t *)dst = reg_value.GetAsUInt32();
667 break;
668 case 8:
669 *(uint64_t *)dst = reg_value.GetAsUInt64();
670 break;
671 default:
672 assert(false && "Unhandled data size.");
673 return Status("unhandled register data size %" PRIu32,
674 reg_info->byte_size);
675 }
676 }
677 }
678
679 Status error = WriteFPR();
680 if (error.Fail())
681 return error;
682
683 if (IsAVX(reg_index)) {
684 if (!CopyYMMtoXSTATE(reg_index, GetByteOrder()))
685 return Status("CopyYMMtoXSTATE() failed");
686 }
687
688 if (IsMPX(reg_index)) {
689 if (!CopyMPXtoXSTATE(reg_index))
690 return Status("CopyMPXtoXSTATE() failed");
691 }
692 return Status();
693 }
694 return Status("failed - register wasn't recognized to be a GPR or an FPR, "
695 "write strategy unknown");
696}
697
698Status NativeRegisterContextLinux_x86_64::ReadAllRegisterValues(
701
702 data_sp.reset(new DataBufferHeap(REG_CONTEXT_SIZE, 0));
703 error = ReadGPR();
704 if (error.Fail())
705 return error;
706
707 error = ReadFPR();
708 if (error.Fail())
709 return error;
710
711 uint8_t *dst = data_sp->GetBytes();
712 ::memcpy(dst, &m_gpr_x86_64, GetRegisterInfoInterface().GetGPRSize());
713 dst += GetRegisterInfoInterface().GetGPRSize();
714 if (m_xstate_type == XStateType::FXSAVE)
715 ::memcpy(dst, &m_xstate->fxsave, sizeof(m_xstate->fxsave));
716 else if (m_xstate_type == XStateType::XSAVE) {
717 lldb::ByteOrder byte_order = GetByteOrder();
718
719 if (IsCPUFeatureAvailable(RegSet::avx)) {
720 // Assemble the YMM register content from the register halves.
721 for (uint32_t reg = m_reg_info.first_ymm; reg <= m_reg_info.last_ymm;
722 ++reg) {
723 if (!CopyXSTATEtoYMM(reg, byte_order)) {
724 error.SetErrorStringWithFormat(
725 "NativeRegisterContextLinux_x86_64::%s "
726 "CopyXSTATEtoYMM() failed for reg num "
727 "%" PRIu32,
728 __FUNCTION__, reg);
729 return error;
730 }
731 }
732 }
733
734 if (IsCPUFeatureAvailable(RegSet::mpx)) {
735 for (uint32_t reg = m_reg_info.first_mpxr; reg <= m_reg_info.last_mpxc;
736 ++reg) {
737 if (!CopyXSTATEtoMPX(reg)) {
738 error.SetErrorStringWithFormat(
739 "NativeRegisterContextLinux_x86_64::%s "
740 "CopyXSTATEtoMPX() failed for reg num "
741 "%" PRIu32,
742 __FUNCTION__, reg);
743 return error;
744 }
745 }
746 }
747 // Copy the extended register state including the assembled ymm registers.
748 ::memcpy(dst, m_xstate.get(), sizeof(FPR));
749 } else {
750 assert(false && "how do we save the floating point registers?");
751 error.SetErrorString("unsure how to save the floating point registers");
752 }
753 /** The following code is specific to Linux x86 based architectures,
754 * where the register orig_eax (32 bit)/orig_rax (64 bit) is set to
755 * -1 to solve the bug 23659, such a setting prevents the automatic
756 * decrement of the instruction pointer which was causing the SIGILL
757 * exception.
758 * **/
759
760 RegisterValue value((uint64_t)-1);
761 const RegisterInfo &info = GetRegisterInfo().GetOrigAxInfo();
762 return DoWriteRegisterValue(info.byte_offset, info.name, value);
763
764 return error;
765}
766
767Status NativeRegisterContextLinux_x86_64::WriteAllRegisterValues(
768 const lldb::DataBufferSP &data_sp) {
770
771 if (!data_sp) {
772 error.SetErrorStringWithFormat(
773 "NativeRegisterContextLinux_x86_64::%s invalid data_sp provided",
774 __FUNCTION__);
775 return error;
776 }
777
778 if (data_sp->GetByteSize() != REG_CONTEXT_SIZE) {
779 error.SetErrorStringWithFormatv(
780 "data_sp contained mismatched data size, expected {0}, actual {1}",
781 REG_CONTEXT_SIZE, data_sp->GetByteSize());
782 return error;
783 }
784
785 const uint8_t *src = data_sp->GetBytes();
786 if (src == nullptr) {
787 error.SetErrorStringWithFormat("NativeRegisterContextLinux_x86_64::%s "
788 "DataBuffer::GetBytes() returned a null "
789 "pointer",
790 __FUNCTION__);
791 return error;
792 }
793 ::memcpy(&m_gpr_x86_64, src, GetRegisterInfoInterface().GetGPRSize());
794
795 error = WriteGPR();
796 if (error.Fail())
797 return error;
798
799 src += GetRegisterInfoInterface().GetGPRSize();
800 if (m_xstate_type == XStateType::FXSAVE)
801 ::memcpy(&m_xstate->fxsave, src, sizeof(m_xstate->fxsave));
802 else if (m_xstate_type == XStateType::XSAVE)
803 ::memcpy(&m_xstate->xsave, src, sizeof(m_xstate->xsave));
804
805 error = WriteFPR();
806 if (error.Fail())
807 return error;
808
809 if (m_xstate_type == XStateType::XSAVE) {
810 lldb::ByteOrder byte_order = GetByteOrder();
811
812 if (IsCPUFeatureAvailable(RegSet::avx)) {
813 // Parse the YMM register content from the register halves.
814 for (uint32_t reg = m_reg_info.first_ymm; reg <= m_reg_info.last_ymm;
815 ++reg) {
816 if (!CopyYMMtoXSTATE(reg, byte_order)) {
817 error.SetErrorStringWithFormat(
818 "NativeRegisterContextLinux_x86_64::%s "
819 "CopyYMMtoXSTATE() failed for reg num "
820 "%" PRIu32,
821 __FUNCTION__, reg);
822 return error;
823 }
824 }
825 }
826
827 if (IsCPUFeatureAvailable(RegSet::mpx)) {
828 for (uint32_t reg = m_reg_info.first_mpxr; reg <= m_reg_info.last_mpxc;
829 ++reg) {
830 if (!CopyMPXtoXSTATE(reg)) {
831 error.SetErrorStringWithFormat(
832 "NativeRegisterContextLinux_x86_64::%s "
833 "CopyMPXtoXSTATE() failed for reg num "
834 "%" PRIu32,
835 __FUNCTION__, reg);
836 return error;
837 }
838 }
839 }
840 }
841
842 return error;
843}
844
845bool NativeRegisterContextLinux_x86_64::IsCPUFeatureAvailable(
846 RegSet feature_code) const {
847 if (m_xstate_type == XStateType::Invalid) {
848 if (const_cast<NativeRegisterContextLinux_x86_64 *>(this)->ReadFPR().Fail())
849 return false;
850 }
851 switch (feature_code) {
852 case RegSet::gpr:
853 case RegSet::fpu:
854 return true;
855 case RegSet::avx: // Check if CPU has AVX and if there is kernel support, by
856 // reading in the XCR0 area of XSAVE.
857 if ((m_xstate->xsave.i387.xcr0 & mask_XSTATE_AVX) == mask_XSTATE_AVX)
858 return true;
859 break;
860 case RegSet::mpx: // Check if CPU has MPX and if there is kernel support, by
861 // reading in the XCR0 area of XSAVE.
862 if ((m_xstate->xsave.i387.xcr0 & mask_XSTATE_MPX) == mask_XSTATE_MPX)
863 return true;
864 break;
865 }
866 return false;
867}
868
869bool NativeRegisterContextLinux_x86_64::IsRegisterSetAvailable(
870 uint32_t set_index) const {
872
873 switch (static_cast<RegSet>(set_index)) {
874 case RegSet::gpr:
875 case RegSet::fpu:
876 return (set_index < num_sets);
877 case RegSet::avx:
878 return IsCPUFeatureAvailable(RegSet::avx);
879 case RegSet::mpx:
880 return IsCPUFeatureAvailable(RegSet::mpx);
881 }
882 return false;
883}
884
885bool NativeRegisterContextLinux_x86_64::IsGPR(uint32_t reg_index) const {
886 // GPRs come first.
887 return reg_index <= m_reg_info.last_gpr;
888}
889
890bool NativeRegisterContextLinux_x86_64::IsFPR(uint32_t reg_index) const {
891 return (m_reg_info.first_fpr <= reg_index &&
892 reg_index <= m_reg_info.last_fpr);
893}
894
895bool NativeRegisterContextLinux_x86_64::IsDR(uint32_t reg_index) const {
896 return (m_reg_info.first_dr <= reg_index &&
897 reg_index <= m_reg_info.last_dr);
898}
899
900Status NativeRegisterContextLinux_x86_64::WriteFPR() {
901 switch (m_xstate_type) {
902 case XStateType::FXSAVE:
903 return WriteRegisterSet(
904 &m_iovec, sizeof(m_xstate->fxsave),
905 fxsr_regset(GetRegisterInfoInterface().GetTargetArchitecture()));
906 case XStateType::XSAVE:
907 return WriteRegisterSet(&m_iovec, sizeof(m_xstate->xsave), NT_X86_XSTATE);
908 default:
909 return Status("Unrecognized FPR type.");
910 }
911}
912
913bool NativeRegisterContextLinux_x86_64::IsAVX(uint32_t reg_index) const {
914 if (!IsCPUFeatureAvailable(RegSet::avx))
915 return false;
916 return (m_reg_info.first_ymm <= reg_index &&
917 reg_index <= m_reg_info.last_ymm);
918}
919
920bool NativeRegisterContextLinux_x86_64::CopyXSTATEtoYMM(
921 uint32_t reg_index, lldb::ByteOrder byte_order) {
922 if (!IsAVX(reg_index))
923 return false;
924
925 if (byte_order == lldb::eByteOrderLittle) {
926 uint32_t reg_no = reg_index - m_reg_info.first_ymm;
927 m_ymm_set.ymm[reg_no] = XStateToYMM(
928 m_xstate->fxsave.xmm[reg_no].bytes,
929 m_xstate->xsave.ymmh[reg_no].bytes);
930 return true;
931 }
932
933 return false; // unsupported or invalid byte order
934}
935
936bool NativeRegisterContextLinux_x86_64::CopyYMMtoXSTATE(
937 uint32_t reg, lldb::ByteOrder byte_order) {
938 if (!IsAVX(reg))
939 return false;
940
941 if (byte_order == lldb::eByteOrderLittle) {
942 uint32_t reg_no = reg - m_reg_info.first_ymm;
943 YMMToXState(m_ymm_set.ymm[reg_no],
944 m_xstate->fxsave.xmm[reg_no].bytes,
945 m_xstate->xsave.ymmh[reg_no].bytes);
946 return true;
947 }
948
949 return false; // unsupported or invalid byte order
950}
951
952void *NativeRegisterContextLinux_x86_64::GetFPRBuffer() {
953 switch (m_xstate_type) {
954 case XStateType::FXSAVE:
955 return &m_xstate->fxsave;
956 case XStateType::XSAVE:
957 return &m_iovec;
958 default:
959 return nullptr;
960 }
961}
962
963size_t NativeRegisterContextLinux_x86_64::GetFPRSize() {
964 switch (m_xstate_type) {
965 case XStateType::FXSAVE:
966 return sizeof(m_xstate->fxsave);
967 case XStateType::XSAVE:
968 return sizeof(m_iovec);
969 default:
970 return 0;
971 }
972}
973
974Status NativeRegisterContextLinux_x86_64::ReadFPR() {
976
977 // Probe XSAVE and if it is not supported fall back to FXSAVE.
978 if (m_xstate_type != XStateType::FXSAVE) {
979 error = ReadRegisterSet(&m_iovec, sizeof(m_xstate->xsave), NT_X86_XSTATE);
980 if (!error.Fail()) {
981 m_xstate_type = XStateType::XSAVE;
982 return error;
983 }
984 }
985 error = ReadRegisterSet(
986 &m_iovec, sizeof(m_xstate->xsave),
987 fxsr_regset(GetRegisterInfoInterface().GetTargetArchitecture()));
988 if (!error.Fail()) {
989 m_xstate_type = XStateType::FXSAVE;
990 return error;
991 }
992 return Status("Unrecognized FPR type.");
993}
994
995bool NativeRegisterContextLinux_x86_64::IsMPX(uint32_t reg_index) const {
996 if (!IsCPUFeatureAvailable(RegSet::mpx))
997 return false;
998 return (m_reg_info.first_mpxr <= reg_index &&
999 reg_index <= m_reg_info.last_mpxc);
1000}
1001
1002bool NativeRegisterContextLinux_x86_64::CopyXSTATEtoMPX(uint32_t reg) {
1003 if (!IsMPX(reg))
1004 return false;
1005
1006 if (reg >= m_reg_info.first_mpxr && reg <= m_reg_info.last_mpxr) {
1007 ::memcpy(m_mpx_set.mpxr[reg - m_reg_info.first_mpxr].bytes,
1008 m_xstate->xsave.mpxr[reg - m_reg_info.first_mpxr].bytes,
1009 sizeof(MPXReg));
1010 } else {
1011 ::memcpy(m_mpx_set.mpxc[reg - m_reg_info.first_mpxc].bytes,
1012 m_xstate->xsave.mpxc[reg - m_reg_info.first_mpxc].bytes,
1013 sizeof(MPXCsr));
1014 }
1015 return true;
1016}
1017
1018bool NativeRegisterContextLinux_x86_64::CopyMPXtoXSTATE(uint32_t reg) {
1019 if (!IsMPX(reg))
1020 return false;
1021
1022 if (reg >= m_reg_info.first_mpxr && reg <= m_reg_info.last_mpxr) {
1023 ::memcpy(m_xstate->xsave.mpxr[reg - m_reg_info.first_mpxr].bytes,
1024 m_mpx_set.mpxr[reg - m_reg_info.first_mpxr].bytes, sizeof(MPXReg));
1025 } else {
1026 ::memcpy(m_xstate->xsave.mpxc[reg - m_reg_info.first_mpxc].bytes,
1027 m_mpx_set.mpxc[reg - m_reg_info.first_mpxc].bytes, sizeof(MPXCsr));
1028 }
1029 return true;
1030}
1031
1032uint32_t
1033NativeRegisterContextLinux_x86_64::GetPtraceOffset(uint32_t reg_index) {
1034 // If register is MPX, remove extra factor from gdb offset
1035 return GetRegisterInfoAtIndex(reg_index)->byte_offset -
1036 (IsMPX(reg_index) ? 128 : 0);
1037}
1038
1039std::optional<NativeRegisterContextLinux::SyscallData>
1040NativeRegisterContextLinux_x86_64::GetSyscallData() {
1041 switch (GetRegisterInfoInterface().GetTargetArchitecture().GetMachine()) {
1042 case llvm::Triple::x86: {
1043 static const uint8_t Int80[] = {0xcd, 0x80};
1044 static const uint32_t Args[] = {lldb_eax_i386, lldb_ebx_i386, lldb_ecx_i386,
1047 return SyscallData{Int80, Args, lldb_eax_i386};
1048 }
1049 case llvm::Triple::x86_64: {
1050 static const uint8_t Syscall[] = {0x0f, 0x05};
1051 static const uint32_t Args[] = {
1052 x86_64_with_base::lldb_rax, x86_64_with_base::lldb_rdi, x86_64_with_base::lldb_rsi, x86_64_with_base::lldb_rdx,
1053 x86_64_with_base::lldb_r10, x86_64_with_base::lldb_r8, x86_64_with_base::lldb_r9};
1054 return SyscallData{Syscall, Args, x86_64_with_base::lldb_rax};
1055 }
1056 default:
1057 llvm_unreachable("Unhandled architecture!");
1058 }
1059}
1060
1061std::optional<NativeRegisterContextLinux::MmapData>
1062NativeRegisterContextLinux_x86_64::GetMmapData() {
1063 switch (GetRegisterInfoInterface().GetTargetArchitecture().GetMachine()) {
1064 case llvm::Triple::x86:
1065 return MmapData{192, 91};
1066 case llvm::Triple::x86_64:
1067 return MmapData{9, 11};
1068 default:
1069 llvm_unreachable("Unhandled architecture!");
1070 }
1071}
1072
1073const RegisterInfo *NativeRegisterContextLinux_x86_64::GetDR(int num) const {
1074 assert(num >= 0 && num <= 7);
1075 switch (GetRegisterInfoInterface().GetTargetArchitecture().GetMachine()) {
1076 case llvm::Triple::x86:
1077 return GetRegisterInfoAtIndex(lldb_dr0_i386 + num);
1078 case llvm::Triple::x86_64:
1079 return GetRegisterInfoAtIndex(x86_64_with_base::lldb_dr0 + num);
1080 default:
1081 llvm_unreachable("Unhandled target architecture.");
1082 }
1083}
1084
1085#endif // defined(__i386__) || defined(__x86_64__)
static llvm::raw_ostream & error(Stream &strm)
#define REG_CONTEXT_SIZE
constexpr size_t k_num_register_sets
struct _FPR FPR
static const RegisterSet g_reg_sets_i386[]
static const uint32_t g_gpr_regnums_x86_64[]
const uint32_t g_gpr_regnums_i386[]
static const RegisterSet g_reg_sets_x86_64[]
const uint32_t g_avx_regnums_i386[]
static const uint32_t g_avx_regnums_x86_64[]
@ k_num_extended_register_sets
An architecture specification class.
Definition: ArchSpec.h:31
uint32_t GetAddressByteSize() const
Returns the size in bytes of an address of the current architecture.
Definition: ArchSpec.cpp:691
llvm::Triple::ArchType GetMachine() const
Returns a machine family for the current architecture.
Definition: ArchSpec.cpp:683
A command line argument class.
Definition: Args.h:33
A subclass of DataBuffer that stores a data buffer on the heap.
uint16_t GetAsUInt16(uint16_t fail_value=UINT16_MAX, bool *success_ptr=nullptr) const
void SetUInt64(uint64_t uint, Type t=eTypeUInt64)
uint8_t GetAsUInt8(uint8_t fail_value=UINT8_MAX, bool *success_ptr=nullptr) const
void SetUInt16(uint16_t uint)
uint64_t GetAsUInt64(uint64_t fail_value=UINT64_MAX, bool *success_ptr=nullptr) const
void SetUInt8(uint8_t uint)
void SetBytes(const void *bytes, size_t length, lldb::ByteOrder byte_order)
const void * GetBytes() const
RegisterValue::Type GetType() const
Definition: RegisterValue.h:91
void SetType(RegisterValue::Type type)
Definition: RegisterValue.h:95
uint32_t GetAsUInt32(uint32_t fail_value=UINT32_MAX, bool *success_ptr=nullptr) const
void SetUInt32(uint32_t uint, Type t=eTypeUInt32)
An error handling class.
Definition: Status.h:44
#define LLDB_INVALID_REGNUM
Definition: lldb-defines.h:87
A class that represents a running process on the host machine.
void YMMToXState(const YMMReg &input, void *xmm_bytes, void *ymmh_bytes)
uint16_t AbridgedToFullTagWord(uint8_t abridged_tw, uint16_t sw, llvm::ArrayRef< MMSReg > st_regs)
YMMReg XStateToYMM(const void *xmm_bytes, const void *ymmh_bytes)
uint8_t FullToAbridgedTagWord(uint16_t tw)
@ eEncodingVector
vector registers
ByteOrder
Byte ordering definitions.
@ eByteOrderInvalid
@ eByteOrderLittle
std::shared_ptr< lldb_private::DataBuffer > DataBufferSP
Definition: lldb-forward.h:334
std::shared_ptr< lldb_private::WritableDataBuffer > WritableDataBufferSP
Definition: lldb-forward.h:335
uint64_t tid_t
Definition: lldb-types.h:84
@ eRegisterKindLLDB
lldb's internal register numbers
Every register is described in detail including its name, alternate name (optional),...
lldb::Encoding encoding
Encoding of the register bits.
uint32_t byte_offset
The byte offset in the register context data where this register's value is found.
uint32_t byte_size
Size in bytes of the register.
uint32_t kinds[lldb::kNumRegisterKinds]
Holds all of the various register numbers for all register kinds.
const char * name
Name of this register, can't be NULL.
uint32_t * invalidate_regs
List of registers (terminated with LLDB_INVALID_REGNUM).
Registers are grouped into register sets.
size_t num_registers
The number of registers in REGISTERS array below.