38 std::vector<uint8_t> function_text(range.GetByteSize());
39 ProcessSP process_sp(thread.GetProcess());
42 const bool force_live_memory =
true;
43 if (process_sp->GetTarget().ReadMemory(
44 range.GetBaseAddress(), function_text.data(), range.GetByteSize(),
45 error, force_live_memory) != range.GetByteSize()) {
50 range, function_text.data(), function_text.size(), unwind_plan);
54 AddressRange &range, uint8_t *opcode_data,
size_t opcode_size,
56 if (opcode_data ==
nullptr || opcode_size == 0)
72 const bool prefer_file_cache =
true;
75 opcode_data, opcode_size, 99999, prefer_file_cache));
85 const uint32_t addr_byte_size =
m_arch.GetAddressByteSize();
86 const bool show_address =
true;
87 const bool show_bytes =
true;
88 const bool show_control_flow_kind =
false;
93 m_state.register_values.clear();
106 const size_t num_instructions = inst_list.
GetSize();
108 if (num_instructions > 0) {
117 std::map<lldb::addr_t, UnwindState> saved_unwind_states;
124 auto condition_block_start_state =
125 saved_unwind_states.emplace(0,
m_state).first;
132 for (
size_t idx = 0; idx < num_instructions; ++idx) {
142 auto it = saved_unwind_states.upper_bound(current_offset);
143 assert(it != saved_unwind_states.begin() &&
144 "Unwind row for the function entry missing");
151 if (it->second.row.GetOffset() !=
m_state.row.GetOffset())
161 m_state = condition_block_start_state->second;
162 m_state.row.SetOffset(current_offset);
165 saved_unwind_states.insert_or_assign(current_offset,
m_state);
169 condition_block_start_state = it;
177 show_bytes, show_control_flow_kind,
nullptr,
nullptr,
178 nullptr, &format, 0);
185 eEmulateInstructionOptionIgnoreConditions);
192 if (
auto [it, inserted] = saved_unwind_states.emplace(
202 if (saved_unwind_states.count(current_offset +
204 m_state.row.SetOffset(current_offset +
206 saved_unwind_states.emplace(
211 for (
auto &[_, state] : saved_unwind_states) {
212 unwind_plan.
InsertRow(std::move(state.row),
220 strm.
Printf(
"Resulting unwind rows for [0x%" PRIx64
" - 0x%" PRIx64
"):",
222 unwind_plan.
Dump(strm,
nullptr, base_addr);
241 Address &first_non_prologue_insn) {
247 std::unique_ptr<EmulateInstruction> inst_emulator_up(
251 if (inst_emulator_up)
266 return "Instruction emulation based unwind information.";
275 return (uint64_t)reg_kind << 24 | reg_num;
287 RegisterValueMap::const_iterator pos =
m_state.register_values.find(reg_id);
288 if (pos !=
m_state.register_values.end()) {
289 reg_value = pos->second;
307 "UnwindAssemblyInstEmulation::ReadMemory (addr = 0x%16.16" PRIx64
308 ", dst = %p, dst_len = %" PRIu64
", context = ",
309 addr, dst, (uint64_t)dst_len);
310 context.
Dump(strm, instruction);
313 memset(dst, 0, dst_len);
320 const void *dst,
size_t dst_len) {
321 if (baton && dst && dst_len)
323 ->WriteMemory(instruction, context, addr, dst, dst_len);
339 strm.
PutCString(
"UnwindAssemblyInstEmulation::WriteMemory (");
343 context.
Dump(strm, instruction);
347 switch (context.
type) {
375 "unhandled case, add code to handle this!");
378 .
kinds[unwind_reg_kind];
386 m_state.row.SetRegisterLocationToAtCFAPlusOffset(reg_num, offset,
402 if (baton && reg_info)
404 ->ReadRegister(instruction, reg_info, reg_value);
417 strm.
Printf(
"UnwindAssemblyInstEmulation::ReadRegister (name = \"%s\") => "
418 "synthetic_value = %i, value = ",
419 reg_info->
name, synthetic);
430 if (baton && reg_info)
432 ->WriteRegister(instruction, context, reg_info, reg_value);
444 "UnwindAssemblyInstEmulation::WriteRegister (name = \"%s\", value = ",
448 context.
Dump(strm, instruction);
454 switch (context.
type) {
491 reg_info->
kinds[kind] ==
m_state.cfa_reg_info.kinds[kind] &&
495 m_state.cfa_reg_info.kinds[kind]) {
497 m_state.row.GetCFAValue().IncOffset(-1 * offset);
524 const uint32_t reg_num =
533 m_state.row.SetRegisterLocationToSame(reg_num,
547 m_state.cfa_reg_info = sp_reg_info;
548 const uint32_t cfa_reg_num =
551 m_state.row.GetCFAValue().SetIsRegisterPlusOffset(
561 "eInfoTypeISA used for popping a register other the PC/FLAGS");
563 m_state.row.SetRegisterLocationToSame(reg_num,
569 assert(
false &&
"unhandled case, add code to handle this!");
578 m_state.cfa_reg_info = *reg_info;
579 const uint32_t cfa_reg_num =
582 m_state.row.GetCFAValue().SetIsRegisterPlusOffset(
591 m_state.cfa_reg_info = *reg_info;
592 const uint32_t cfa_reg_num =
595 m_state.row.GetCFAValue().SetIsRegisterPlusOffset(
605 m_state.row.GetCFAValue().SetIsRegisterPlusOffset(
606 m_state.row.GetCFAValue().GetRegisterNumber(),
static llvm::raw_ostream & error(Stream &strm)
#define LLDB_PLUGIN_DEFINE(PluginName)
bool GetRegisterValue(const lldb_private::RegisterInfo ®_info, lldb_private::RegisterValue ®_value)
static llvm::StringRef GetPluginNameStatic()
bool GetFastUnwindPlan(lldb_private::AddressRange &func, lldb_private::Thread &thread, lldb_private::UnwindPlan &unwind_plan) override
std::unique_ptr< lldb_private::EmulateInstruction > m_inst_emulator_up
lldb_private::UnwindPlan * m_unwind_plan_ptr
static size_t WriteMemory(lldb_private::EmulateInstruction *instruction, void *baton, const lldb_private::EmulateInstruction::Context &context, lldb::addr_t addr, const void *dst, size_t length)
uint32_t m_forward_branch_offset
static bool WriteRegister(lldb_private::EmulateInstruction *instruction, void *baton, const lldb_private::EmulateInstruction::Context &context, const lldb_private::RegisterInfo *reg_info, const lldb_private::RegisterValue ®_value)
static llvm::StringRef GetPluginDescriptionStatic()
bool AugmentUnwindPlanFromCallSite(lldb_private::AddressRange &func, lldb_private::Thread &thread, lldb_private::UnwindPlan &unwind_plan) override
static size_t ReadMemory(lldb_private::EmulateInstruction *instruction, void *baton, const lldb_private::EmulateInstruction::Context &context, lldb::addr_t addr, void *dst, size_t length)
lldb_private::AddressRange * m_range_ptr
static bool ReadRegister(lldb_private::EmulateInstruction *instruction, void *baton, const lldb_private::RegisterInfo *reg_info, lldb_private::RegisterValue ®_value)
static uint64_t MakeRegisterKindValuePair(const lldb_private::RegisterInfo ®_info)
static lldb_private::UnwindAssembly * CreateInstance(const lldb_private::ArchSpec &arch)
bool GetNonCallSiteUnwindPlanFromAssembly(lldb_private::AddressRange &func, lldb_private::Thread &thread, lldb_private::UnwindPlan &unwind_plan) override
void SetRegisterValue(const lldb_private::RegisterInfo ®_info, const lldb_private::RegisterValue ®_value)
UnwindAssemblyInstEmulation(const lldb_private::ArchSpec &arch, lldb_private::EmulateInstruction *inst_emulator)
PushedRegisterToAddrMap m_pushed_regs
bool FirstNonPrologueInsn(lldb_private::AddressRange &func, const lldb_private::ExecutionContext &exe_ctx, lldb_private::Address &first_non_prologue_insn) override
A section + offset based address range class.
Address & GetBaseAddress()
Get accessor for the base address of the range.
bool ContainsFileAddress(const Address &so_addr) const
Check if a section offset address is contained in this range.
lldb::addr_t GetByteSize() const
Get accessor for the byte size of this range.
A section + offset based address class.
lldb::addr_t GetFileAddress() const
Get the file address.
bool IsValid() const
Check if the object state is valid.
An architecture specification class.
uint32_t GetAddressByteSize() const
Returns the size in bytes of an address of the current architecture.
lldb::ByteOrder GetByteOrder() const
Returns the byte order for the architecture specification.
static lldb::DisassemblerSP DisassembleBytes(const ArchSpec &arch, const char *plugin_name, const char *flavor, const char *cpu, const char *features, const Address &start, const void *bytes, size_t length, uint32_t max_num_instructions, bool data_from_file)
"lldb/Core/EmulateInstruction.h" A class that allows emulation of CPU opcodes.
static bool GetBestRegisterKindAndNumber(const RegisterInfo *reg_info, lldb::RegisterKind ®_kind, uint32_t ®_num)
@ eContextRelativeBranchImmediate
@ eContextSetFramePointer
@ eContextAdjustBaseRegister
@ eContextWriteMemoryRandomBits
@ eContextTableBranchReadMemory
@ eContextWriteRegisterRandomBits
@ eContextAdjustStackPointer
@ eContextRestoreStackPointer
@ eContextReturnFromException
@ eContextPushRegisterOnStack
@ eContextPopRegisterOffStack
@ eContextAbsoluteBranchRegister
@ eContextRegisterPlusOffset
@ eInfoTypeRegisterPlusOffset
@ eInfoTypeImmediateSigned
@ eInfoTypeISAAndImmediate
@ eInfoTypeRegisterToRegisterPlusOffset
@ eInfoTypeISAAndImmediateSigned
const ArchSpec & GetArchitecture() const
static const InstructionCondition UnconditionalCondition
static EmulateInstruction * FindPlugin(const ArchSpec &arch, InstructionType supported_inst_type, const char *plugin_name)
uint32_t InstructionCondition
"lldb/Target/ExecutionContext.h" A class that contains an execution context.
lldb::InstructionSP GetInstructionAtIndex(size_t idx) const
uint32_t GetMaxOpcocdeByteSize() const
const Address & GetAddress() const
const Opcode & GetOpcode() const
virtual void Dump(Stream *s, uint32_t max_opcode_byte_size, bool show_address, bool show_bytes, bool show_control_flow_kind, const ExecutionContext *exe_ctx, const SymbolContext *sym_ctx, const SymbolContext *prev_sym_ctx, const FormatEntity::Entry *disassembly_addr_format, size_t max_address_text_size)
Dump the text representation of this Instruction to a Stream.
void PutString(llvm::StringRef str)
uint32_t GetByteSize() const
static bool RegisterPlugin(llvm::StringRef name, llvm::StringRef description, ABICreateInstance create_callback)
static bool UnregisterPlugin(ABICreateInstance create_callback)
bool SetUInt(uint64_t uint, uint32_t byte_size)
uint64_t GetAsUInt64(uint64_t fail_value=UINT64_MAX, bool *success_ptr=nullptr) const
llvm::StringRef GetString() const
size_t Printf(const char *format,...) __attribute__((format(printf
Output printf formatted output to the stream.
size_t PutCString(llvm::StringRef cstr)
Output a C string to the stream.
uint32_t GetInitialCFARegister() const
void InsertRow(Row row, bool replace_existing=false)
lldb::RegisterKind GetRegisterKind() const
const UnwindPlan::Row * GetLastRow() const
void Dump(Stream &s, Thread *thread, lldb::addr_t base_addr) const
#define LLDB_REGNUM_GENERIC_SP
#define LLDB_REGNUM_GENERIC_FLAGS
#define LLDB_INVALID_REGNUM
#define LLDB_REGNUM_GENERIC_PC
A class that represents a running process on the host machine.
Log * GetLog(Cat mask)
Retrieve the Log object for the channel associated with the given log enum.
@ eInstructionTypePrologueEpilogue
lldb::offset_t DumpDataExtractor(const DataExtractor &DE, Stream *s, lldb::offset_t offset, lldb::Format item_format, size_t item_byte_size, size_t item_count, size_t num_per_line, uint64_t base_addr, uint32_t item_bit_size, uint32_t item_bit_offset, ExecutionContextScope *exe_scope=nullptr, bool show_memory_tags=false)
Dumps item_count objects into the stream s.
void DumpRegisterValue(const RegisterValue ®_val, Stream &s, const RegisterInfo ®_info, bool prefix_with_name, bool prefix_with_alt_name, lldb::Format format, uint32_t reg_name_right_align_at=0, ExecutionContextScope *exe_scope=nullptr, bool print_flags=false, lldb::TargetSP target_sp=nullptr)
std::shared_ptr< lldb_private::Process > ProcessSP
std::shared_ptr< lldb_private::Disassembler > DisassemblerSP
RegisterKind
Register numbering types.
@ eRegisterKindGeneric
insn ptr reg, stack ptr reg, etc not specific to any particular target
void Dump(Stream &s, EmulateInstruction *instruction) const
union lldb_private::EmulateInstruction::Context::ContextInfo info
enum InfoType GetInfoType() const
Every register is described in detail including its name, alternate name (optional),...
uint32_t byte_size
Size in bytes of the register.
uint32_t kinds[lldb::kNumRegisterKinds]
Holds all of the various register numbers for all register kinds.
const char * name
Name of this register, can't be NULL.
struct lldb_private::EmulateInstruction::Context::ContextInfo::ISAAndImmediateSigned ISAAndImmediateSigned
struct lldb_private::EmulateInstruction::Context::ContextInfo::RegisterPlusOffset RegisterPlusOffset
uint64_t unsigned_immediate
struct lldb_private::EmulateInstruction::Context::ContextInfo::RegisterToRegisterPlusOffset RegisterToRegisterPlusOffset
struct lldb_private::EmulateInstruction::Context::ContextInfo::ISAAndImmediate ISAAndImmediate