LLDB mainline
ABISysV_mips.cpp
Go to the documentation of this file.
1//===-- ABISysV_mips.cpp --------------------------------------------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8
9#include "ABISysV_mips.h"
10
11#include "llvm/ADT/STLExtras.h"
12#include "llvm/TargetParser/Triple.h"
13
14#include "lldb/Core/Module.h"
16#include "lldb/Core/Value.h"
18#include "lldb/Target/Process.h"
21#include "lldb/Target/Target.h"
22#include "lldb/Target/Thread.h"
26#include "lldb/Utility/Log.h"
28#include "lldb/Utility/Status.h"
32#include <optional>
33
34using namespace lldb;
35using namespace lldb_private;
36
38
79
81 {"r0",
82 "zero",
83 4,
84 0,
89 nullptr,
90 nullptr,
91 nullptr,
92 },
93 {"r1",
94 "AT",
95 4,
96 0,
101 nullptr,
102 nullptr,
103 nullptr,
104 },
105 {"r2",
106 "v0",
107 4,
108 0,
113 nullptr,
114 nullptr,
115 nullptr,
116 },
117 {"r3",
118 "v1",
119 4,
120 0,
125 nullptr,
126 nullptr,
127 nullptr,
128 },
129 {"r4",
130 nullptr,
131 4,
132 0,
137 nullptr,
138 nullptr,
139 nullptr,
140 },
141 {"r5",
142 nullptr,
143 4,
144 0,
149 nullptr,
150 nullptr,
151 nullptr,
152 },
153 {"r6",
154 nullptr,
155 4,
156 0,
161 nullptr,
162 nullptr,
163 nullptr,
164 },
165 {"r7",
166 nullptr,
167 4,
168 0,
173 nullptr,
174 nullptr,
175 nullptr,
176 },
177 {"r8",
178 "arg5",
179 4,
180 0,
185 nullptr,
186 nullptr,
187 nullptr,
188 },
189 {"r9",
190 "arg6",
191 4,
192 0,
197 nullptr,
198 nullptr,
199 nullptr,
200 },
201 {"r10",
202 "arg7",
203 4,
204 0,
209 nullptr,
210 nullptr,
211 nullptr,
212 },
213 {"r11",
214 "arg8",
215 4,
216 0,
221 nullptr,
222 nullptr,
223 nullptr,
224 },
225 {"r12",
226 nullptr,
227 4,
228 0,
233 nullptr,
234 nullptr,
235 nullptr,
236 },
237 {"r13",
238 nullptr,
239 4,
240 0,
245 nullptr,
246 nullptr,
247 nullptr,
248 },
249 {"r14",
250 nullptr,
251 4,
252 0,
257 nullptr,
258 nullptr,
259 nullptr,
260 },
261 {"r15",
262 nullptr,
263 4,
264 0,
269 nullptr,
270 nullptr,
271 nullptr,
272 },
273 {"r16",
274 nullptr,
275 4,
276 0,
281 nullptr,
282 nullptr,
283 nullptr,
284 },
285 {"r17",
286 nullptr,
287 4,
288 0,
293 nullptr,
294 nullptr,
295 nullptr,
296 },
297 {"r18",
298 nullptr,
299 4,
300 0,
305 nullptr,
306 nullptr,
307 nullptr,
308 },
309 {"r19",
310 nullptr,
311 4,
312 0,
317 nullptr,
318 nullptr,
319 nullptr,
320 },
321 {"r20",
322 nullptr,
323 4,
324 0,
329 nullptr,
330 nullptr,
331 nullptr,
332 },
333 {"r21",
334 nullptr,
335 4,
336 0,
341 nullptr,
342 nullptr,
343 nullptr,
344 },
345 {"r22",
346 nullptr,
347 4,
348 0,
353 nullptr,
354 nullptr,
355 nullptr,
356 },
357 {"r23",
358 nullptr,
359 4,
360 0,
365 nullptr,
366 nullptr,
367 nullptr,
368 },
369 {"r24",
370 nullptr,
371 4,
372 0,
377 nullptr,
378 nullptr,
379 nullptr,
380 },
381 {"r25",
382 nullptr,
383 4,
384 0,
389 nullptr,
390 nullptr,
391 nullptr,
392 },
393 {"r26",
394 nullptr,
395 4,
396 0,
401 nullptr,
402 nullptr,
403 nullptr,
404 },
405 {"r27",
406 nullptr,
407 4,
408 0,
413 nullptr,
414 nullptr,
415 nullptr,
416 },
417 {"r28",
418 "gp",
419 4,
420 0,
425 nullptr,
426 nullptr,
427 nullptr,
428 },
429 {"r29",
430 nullptr,
431 4,
432 0,
437 nullptr,
438 nullptr,
439 nullptr,
440 },
441 {"r30",
442 nullptr,
443 4,
444 0,
449 nullptr,
450 nullptr,
451 nullptr,
452 },
453 {"r31",
454 nullptr,
455 4,
456 0,
461 nullptr,
462 nullptr,
463 nullptr,
464 },
465 {"sr",
466 nullptr,
467 4,
468 0,
473 nullptr,
474 nullptr,
475 nullptr,
476 },
477 {"lo",
478 nullptr,
479 4,
480 0,
485 nullptr,
486 nullptr,
487 nullptr,
488 },
489 {"hi",
490 nullptr,
491 4,
492 0,
497 nullptr,
498 nullptr,
499 nullptr,
500 },
501 {"bad",
502 nullptr,
503 4,
504 0,
509 nullptr,
510 nullptr,
511 nullptr,
512 },
513 {"cause",
514 nullptr,
515 4,
516 0,
521 nullptr,
522 nullptr,
523 nullptr,
524 },
525 {"pc",
526 nullptr,
527 4,
528 0,
533 nullptr,
534 nullptr,
535 nullptr,
536 },
537};
538
539static const uint32_t k_num_register_infos = std::size(g_register_infos);
540
543 count = k_num_register_infos;
544 return g_register_infos;
545}
546
547size_t ABISysV_mips::GetRedZoneSize() const { return 0; }
548
549// Static Functions
550
551ABISP
553 const llvm::Triple::ArchType arch_type = arch.GetTriple().getArch();
554 if ((arch_type == llvm::Triple::mips) ||
555 (arch_type == llvm::Triple::mipsel)) {
556 return ABISP(
557 new ABISysV_mips(std::move(process_sp), MakeMCRegisterInfo(arch)));
558 }
559 return ABISP();
560}
561
563 addr_t func_addr, addr_t return_addr,
564 llvm::ArrayRef<addr_t> args) const {
566
567 if (log) {
568 StreamString s;
569 s.Printf("ABISysV_mips::PrepareTrivialCall (tid = 0x%" PRIx64
570 ", sp = 0x%" PRIx64 ", func_addr = 0x%" PRIx64
571 ", return_addr = 0x%" PRIx64,
572 thread.GetID(), (uint64_t)sp, (uint64_t)func_addr,
573 (uint64_t)return_addr);
574
575 for (size_t i = 0; i < args.size(); ++i)
576 s.Printf(", arg%zd = 0x%" PRIx64, i + 1, args[i]);
577 s.PutCString(")");
578 log->PutString(s.GetString());
579 }
580
581 RegisterContext *reg_ctx = thread.GetRegisterContext().get();
582 if (!reg_ctx)
583 return false;
584
585 const RegisterInfo *reg_info = nullptr;
586
587 RegisterValue reg_value;
588
589 // Argument registers
590 const char *reg_names[] = {"r4", "r5", "r6", "r7"};
591
592 llvm::ArrayRef<addr_t>::iterator ai = args.begin(), ae = args.end();
593
594 // Write arguments to registers
595 for (size_t i = 0; i < std::size(reg_names); ++i) {
596 if (ai == ae)
597 break;
598
599 reg_info = reg_ctx->GetRegisterInfo(eRegisterKindGeneric,
601 LLDB_LOGF(log, "About to write arg%zd (0x%" PRIx64 ") into %s", i + 1,
602 args[i], reg_info->name);
603
604 if (!reg_ctx->WriteRegisterFromUnsigned(reg_info, args[i]))
605 return false;
606
607 ++ai;
608 }
609
610 // If we have more than 4 arguments --Spill onto the stack
611 if (ai != ae) {
612 // No of arguments to go on stack
613 size_t num_stack_regs = args.size();
614
615 // Allocate needed space for args on the stack
616 sp -= (num_stack_regs * 4);
617
618 // Keep the stack 8 byte aligned
619 sp &= ~(8ull - 1ull);
620
621 // just using arg1 to get the right size
622 const RegisterInfo *reg_info = reg_ctx->GetRegisterInfo(
624
625 addr_t arg_pos = sp + 16;
626
627 size_t i = 4;
628 for (; ai != ae; ++ai) {
629 reg_value.SetUInt32(*ai);
630 LLDB_LOGF(log, "About to write arg%zd (0x%" PRIx64 ") at 0x%" PRIx64 "",
631 i + 1, args[i], arg_pos);
632
633 if (reg_ctx
634 ->WriteRegisterValueToMemory(reg_info, arg_pos,
635 reg_info->byte_size, reg_value)
636 .Fail())
637 return false;
638 arg_pos += reg_info->byte_size;
639 i++;
640 }
641 }
642
644 const RegisterInfo *pc_reg_info =
646 const RegisterInfo *sp_reg_info =
648 const RegisterInfo *ra_reg_info =
650 const RegisterInfo *r25_info = reg_ctx->GetRegisterInfoByName("r25", 0);
651 const RegisterInfo *r0_info = reg_ctx->GetRegisterInfoByName("zero", 0);
652
653 LLDB_LOGF(log, "Writing R0: 0x%" PRIx64, (uint64_t)0);
654
655 /* Write r0 with 0, in case we are stopped in syscall,
656 * such setting prevents automatic decrement of the PC.
657 * This clears the bug 23659 for MIPS.
658 */
659 if (!reg_ctx->WriteRegisterFromUnsigned(r0_info, (uint64_t)0))
660 return false;
661
662 LLDB_LOGF(log, "Writing SP: 0x%" PRIx64, (uint64_t)sp);
663
664 // Set "sp" to the requested value
665 if (!reg_ctx->WriteRegisterFromUnsigned(sp_reg_info, sp))
666 return false;
667
668 LLDB_LOGF(log, "Writing RA: 0x%" PRIx64, (uint64_t)return_addr);
669
670 // Set "ra" to the return address
671 if (!reg_ctx->WriteRegisterFromUnsigned(ra_reg_info, return_addr))
672 return false;
673
674 LLDB_LOGF(log, "Writing PC: 0x%" PRIx64, (uint64_t)func_addr);
675
676 // Set pc to the address of the called function.
677 if (!reg_ctx->WriteRegisterFromUnsigned(pc_reg_info, func_addr))
678 return false;
679
680 LLDB_LOGF(log, "Writing r25: 0x%" PRIx64, (uint64_t)func_addr);
681
682 // All callers of position independent functions must place the address of
683 // the called function in t9 (r25)
684 if (!reg_ctx->WriteRegisterFromUnsigned(r25_info, func_addr))
685 return false;
686
687 return true;
688}
689
691 return false;
692}
693
695 lldb::ValueObjectSP &new_value_sp) {
697 if (!new_value_sp) {
698 error = Status::FromErrorString("Empty value object for return value.");
699 return error;
700 }
701
702 CompilerType compiler_type = new_value_sp->GetCompilerType();
703 if (!compiler_type) {
704 error = Status::FromErrorString("Null clang type for return value.");
705 return error;
706 }
707
708 Thread *thread = frame_sp->GetThread().get();
709
710 bool is_signed;
711
712 RegisterContext *reg_ctx = thread->GetRegisterContext().get();
713
714 bool set_it_simple = false;
715 if (compiler_type.IsIntegerOrEnumerationType(is_signed) ||
716 compiler_type.IsPointerType()) {
717 DataExtractor data;
718 Status data_error;
719 size_t num_bytes = new_value_sp->GetData(data, data_error);
720 if (data_error.Fail()) {
722 "Couldn't convert return value to raw data: %s",
723 data_error.AsCString());
724 return error;
725 }
726
727 lldb::offset_t offset = 0;
728 if (num_bytes <= 8) {
729 const RegisterInfo *r2_info = reg_ctx->GetRegisterInfoByName("r2", 0);
730 if (num_bytes <= 4) {
731 uint32_t raw_value = data.GetMaxU32(&offset, num_bytes);
732
733 if (reg_ctx->WriteRegisterFromUnsigned(r2_info, raw_value))
734 set_it_simple = true;
735 } else {
736 uint32_t raw_value = data.GetMaxU32(&offset, 4);
737
738 if (reg_ctx->WriteRegisterFromUnsigned(r2_info, raw_value)) {
739 const RegisterInfo *r3_info = reg_ctx->GetRegisterInfoByName("r3", 0);
740 uint32_t raw_value = data.GetMaxU32(&offset, num_bytes - offset);
741
742 if (reg_ctx->WriteRegisterFromUnsigned(r3_info, raw_value))
743 set_it_simple = true;
744 }
745 }
746 } else {
748 "We don't support returning longer than 64 bit "
749 "integer values at present.");
750 }
751 }
752
753 if (!set_it_simple)
755 "We only support setting simple integer return types at present.");
756
757 return error;
758}
759
761 Thread &thread, CompilerType &return_compiler_type) const {
762 ValueObjectSP return_valobj_sp;
763 return return_valobj_sp;
764}
765
767 Thread &thread, CompilerType &return_compiler_type) const {
768 ValueObjectSP return_valobj_sp;
769 Value value;
770
771 if (!return_compiler_type)
772 return return_valobj_sp;
773
774 ExecutionContext exe_ctx(thread.shared_from_this());
775 if (exe_ctx.GetTargetPtr() == nullptr || exe_ctx.GetProcessPtr() == nullptr)
776 return return_valobj_sp;
777
778 Target *target = exe_ctx.GetTargetPtr();
779 const ArchSpec target_arch = target->GetArchitecture();
780 ByteOrder target_byte_order = target_arch.GetByteOrder();
781 value.SetCompilerType(return_compiler_type);
782 uint32_t fp_flag =
784
785 RegisterContext *reg_ctx = thread.GetRegisterContext().get();
786 if (!reg_ctx)
787 return return_valobj_sp;
788
789 bool is_signed = false;
790
791 // In MIPS register "r2" (v0) holds the integer function return values
792 const RegisterInfo *r2_reg_info = reg_ctx->GetRegisterInfoByName("r2", 0);
793 std::optional<uint64_t> bit_width =
794 llvm::expectedToOptional(return_compiler_type.GetBitSize(&thread));
795 if (!bit_width)
796 return return_valobj_sp;
797 if (return_compiler_type.IsIntegerOrEnumerationType(is_signed)) {
798 switch (*bit_width) {
799 default:
800 return return_valobj_sp;
801 case 64: {
802 const RegisterInfo *r3_reg_info = reg_ctx->GetRegisterInfoByName("r3", 0);
803 uint64_t raw_value;
804 raw_value = reg_ctx->ReadRegisterAsUnsigned(r2_reg_info, 0) & UINT32_MAX;
805 raw_value |= ((uint64_t)(reg_ctx->ReadRegisterAsUnsigned(r3_reg_info, 0) &
806 UINT32_MAX))
807 << 32;
808 if (is_signed)
809 value.GetScalar() = (int64_t)raw_value;
810 else
811 value.GetScalar() = (uint64_t)raw_value;
812 } break;
813 case 32:
814 if (is_signed)
815 value.GetScalar() = (int32_t)(
816 reg_ctx->ReadRegisterAsUnsigned(r2_reg_info, 0) & UINT32_MAX);
817 else
818 value.GetScalar() = (uint32_t)(
819 reg_ctx->ReadRegisterAsUnsigned(r2_reg_info, 0) & UINT32_MAX);
820 break;
821 case 16:
822 if (is_signed)
823 value.GetScalar() = (int16_t)(
824 reg_ctx->ReadRegisterAsUnsigned(r2_reg_info, 0) & UINT16_MAX);
825 else
826 value.GetScalar() = (uint16_t)(
827 reg_ctx->ReadRegisterAsUnsigned(r2_reg_info, 0) & UINT16_MAX);
828 break;
829 case 8:
830 if (is_signed)
831 value.GetScalar() = (int8_t)(
832 reg_ctx->ReadRegisterAsUnsigned(r2_reg_info, 0) & UINT8_MAX);
833 else
834 value.GetScalar() = (uint8_t)(
835 reg_ctx->ReadRegisterAsUnsigned(r2_reg_info, 0) & UINT8_MAX);
836 break;
837 }
838 } else if (return_compiler_type.IsPointerType()) {
839 uint32_t ptr =
840 thread.GetRegisterContext()->ReadRegisterAsUnsigned(r2_reg_info, 0) &
842 value.GetScalar() = ptr;
843 } else if (return_compiler_type.IsAggregateType()) {
844 // Structure/Vector is always passed in memory and pointer to that memory
845 // is passed in r2.
846 uint64_t mem_address = reg_ctx->ReadRegisterAsUnsigned(
847 reg_ctx->GetRegisterInfoByName("r2", 0), 0);
848 // We have got the address. Create a memory object out of it
849 return_valobj_sp = ValueObjectMemory::Create(
850 &thread, "", Address(mem_address, nullptr), return_compiler_type);
851 return return_valobj_sp;
852 } else if (return_compiler_type.IsRealFloatingPointType()) {
853 if (IsSoftFloat(fp_flag)) {
854 uint64_t raw_value = reg_ctx->ReadRegisterAsUnsigned(r2_reg_info, 0);
855 switch (*bit_width) {
856 default:
857 return return_valobj_sp;
858 case 32:
859 static_assert(sizeof(float) == sizeof(uint32_t));
860 value.GetScalar() = *((float *)(&raw_value));
861 break;
862 case 64:
863 static_assert(sizeof(double) == sizeof(uint64_t));
864 const RegisterInfo *r3_reg_info =
865 reg_ctx->GetRegisterInfoByName("r3", 0);
866 if (target_byte_order == eByteOrderLittle)
867 raw_value =
868 ((reg_ctx->ReadRegisterAsUnsigned(r3_reg_info, 0)) << 32) |
869 raw_value;
870 else
871 raw_value = (raw_value << 32) |
872 reg_ctx->ReadRegisterAsUnsigned(r3_reg_info, 0);
873 value.GetScalar() = *((double *)(&raw_value));
874 break;
875 }
876 }
877
878 else {
879 const RegisterInfo *f0_info = reg_ctx->GetRegisterInfoByName("f0", 0);
880 RegisterValue f0_value;
881 DataExtractor f0_data;
882 reg_ctx->ReadRegister(f0_info, f0_value);
883 f0_value.GetData(f0_data);
884 lldb::offset_t offset = 0;
885
886 switch (*bit_width) {
887 default:
888 return return_valobj_sp;
889 case 64: {
890 static_assert(sizeof(double) == sizeof(uint64_t));
891 const RegisterInfo *f1_info = reg_ctx->GetRegisterInfoByName("f1", 0);
892 RegisterValue f1_value;
893 DataExtractor f1_data;
894 reg_ctx->ReadRegister(f1_info, f1_value);
895 DataExtractor *copy_from_extractor = nullptr;
896 WritableDataBufferSP data_sp(new DataBufferHeap(8, 0));
897 DataExtractor return_ext(
898 data_sp, target_byte_order,
900
901 if (target_byte_order == eByteOrderLittle) {
902 copy_from_extractor = &f0_data;
903 copy_from_extractor->CopyByteOrderedData(
904 offset, 4, data_sp->GetBytes(), 4, target_byte_order);
905 f1_value.GetData(f1_data);
906 copy_from_extractor = &f1_data;
907 copy_from_extractor->CopyByteOrderedData(
908 offset, 4, data_sp->GetBytes() + 4, 4, target_byte_order);
909 } else {
910 copy_from_extractor = &f0_data;
911 copy_from_extractor->CopyByteOrderedData(
912 offset, 4, data_sp->GetBytes() + 4, 4, target_byte_order);
913 f1_value.GetData(f1_data);
914 copy_from_extractor = &f1_data;
915 copy_from_extractor->CopyByteOrderedData(
916 offset, 4, data_sp->GetBytes(), 4, target_byte_order);
917 }
918 value.GetScalar() = (double)return_ext.GetDouble(&offset);
919 break;
920 }
921 case 32: {
922 static_assert(sizeof(float) == sizeof(uint32_t));
923 value.GetScalar() = (float)f0_data.GetFloat(&offset);
924 break;
925 }
926 }
927 }
928 } else {
929 // not handled yet
930 return return_valobj_sp;
931 }
932
933 // If we get here, we have a valid Value, so make our ValueObject out of it:
934
935 return_valobj_sp = ValueObjectConstResult::Create(
936 thread.GetStackFrameAtIndex(0).get(), value, ConstString(""));
937 return return_valobj_sp;
938}
939
941 UnwindPlan::Row row;
942
943 // Our Call Frame Address is the stack pointer value
945
946 // The previous PC is in the RA, all other registers are the same.
948
949 auto plan_sp = std::make_shared<UnwindPlan>(eRegisterKindDWARF);
950 plan_sp->AppendRow(std::move(row));
951 plan_sp->SetSourceName("mips at-func-entry default");
952 plan_sp->SetSourcedFromCompiler(eLazyBoolNo);
953 plan_sp->SetReturnAddressRegister(dwarf_r31);
954 return plan_sp;
955}
956
958 UnwindPlan::Row row;
959
962
964
965 auto plan_sp = std::make_shared<UnwindPlan>(eRegisterKindDWARF);
966 plan_sp->AppendRow(std::move(row));
967 plan_sp->SetSourceName("mips default unwind plan");
968 plan_sp->SetSourcedFromCompiler(eLazyBoolNo);
969 plan_sp->SetUnwindPlanValidAtAllInstructions(eLazyBoolNo);
970 plan_sp->SetUnwindPlanForSignalTrap(eLazyBoolNo);
971 return plan_sp;
972}
973
975 return !RegisterIsCalleeSaved(reg_info);
976}
977
978bool ABISysV_mips::IsSoftFloat(uint32_t fp_flags) const {
980}
981
983 if (reg_info) {
984 // Preserved registers are :
985 // r16-r23, r28, r29, r30, r31
986 const char *name = reg_info->name;
987
988 if (name[0] == 'r') {
989 switch (name[1]) {
990 case '1':
991 if (name[2] == '6' || name[2] == '7' || name[2] == '8' ||
992 name[2] == '9') // r16-r19
993 return name[3] == '\0';
994 break;
995 case '2':
996 if (name[2] == '0' || name[2] == '1' || name[2] == '2' ||
997 name[2] == '3' // r20-r23
998 || name[2] == '8' || name[2] == '9') // r28 and r29
999 return name[3] == '\0';
1000 break;
1001 case '3':
1002 if (name[2] == '0' || name[2] == '1') // r30 and r31
1003 return name[3] == '\0';
1004 break;
1005 }
1006
1007 if (name[0] == 'g' && name[1] == 'p' && name[2] == '\0') // gp (r28)
1008 return true;
1009 if (name[0] == 's' && name[1] == 'p' && name[2] == '\0') // sp (r29)
1010 return true;
1011 if (name[0] == 'f' && name[1] == 'p' && name[2] == '\0') // fp (r30)
1012 return true;
1013 if (name[0] == 'r' && name[1] == 'a' && name[2] == '\0') // ra (r31)
1014 return true;
1015 }
1016 }
1017 return false;
1018}
1019
1022 GetPluginNameStatic(), "System V ABI for mips targets", CreateInstance);
1023}
1024
static const uint32_t k_num_register_infos
static const RegisterInfo g_register_infos[]
dwarf_regnums
@ dwarf_r7
@ dwarf_r21
@ dwarf_r24
@ dwarf_r12
@ dwarf_hi
@ dwarf_r3
@ dwarf_r13
@ dwarf_r2
@ dwarf_r8
@ dwarf_r28
@ dwarf_bad
@ dwarf_r11
@ dwarf_r31
@ dwarf_sr
@ dwarf_r19
@ dwarf_r1
@ dwarf_r26
@ dwarf_r9
@ dwarf_pc
@ dwarf_r29
@ dwarf_r16
@ dwarf_r18
@ dwarf_r17
@ dwarf_r15
@ dwarf_lo
@ dwarf_r23
@ dwarf_r10
@ dwarf_cause
@ dwarf_r14
@ dwarf_r6
@ dwarf_r25
@ dwarf_r30
@ dwarf_r0
@ dwarf_r5
@ dwarf_r20
@ dwarf_r27
@ dwarf_r4
@ dwarf_r22
static llvm::raw_ostream & error(Stream &strm)
#define LLDB_LOGF(log,...)
Definition Log.h:376
#define LLDB_PLUGIN_DEFINE(PluginName)
bool RegisterIsVolatile(const lldb_private::RegisterInfo *reg_info) override
static llvm::StringRef GetPluginNameStatic()
lldb_private::Status SetReturnValueObject(lldb::StackFrameSP &frame_sp, lldb::ValueObjectSP &new_value) override
static void Initialize()
lldb::ValueObjectSP GetReturnValueObjectImpl(lldb_private::Thread &thread, lldb_private::CompilerType &type) const override
bool IsSoftFloat(uint32_t fp_flag) const
const lldb_private::RegisterInfo * GetRegisterInfoArray(uint32_t &count) override
static lldb::ABISP CreateInstance(lldb::ProcessSP process_sp, const lldb_private::ArchSpec &arch)
bool GetArgumentValues(lldb_private::Thread &thread, lldb_private::ValueList &values) const override
lldb::ValueObjectSP GetReturnValueObjectSimple(lldb_private::Thread &thread, lldb_private::CompilerType &ast_type) const
static void Terminate()
bool PrepareTrivialCall(lldb_private::Thread &thread, lldb::addr_t sp, lldb::addr_t functionAddress, lldb::addr_t returnAddress, llvm::ArrayRef< lldb::addr_t > args) const override
lldb::UnwindPlanSP CreateDefaultUnwindPlan() override
size_t GetRedZoneSize() const override
bool RegisterIsCalleeSaved(const lldb_private::RegisterInfo *reg_info)
lldb::UnwindPlanSP CreateFunctionEntryUnwindPlan() override
static std::unique_ptr< llvm::MCRegisterInfo > MakeMCRegisterInfo(const ArchSpec &arch)
Utility function to construct a MCRegisterInfo using the ArchSpec triple.
Definition ABI.cpp:225
A section + offset based address class.
Definition Address.h:62
An architecture specification class.
Definition ArchSpec.h:32
uint32_t GetAddressByteSize() const
Returns the size in bytes of an address of the current architecture.
Definition ArchSpec.cpp:681
llvm::Triple & GetTriple()
Architecture triple accessor.
Definition ArchSpec.h:457
uint32_t GetFlags() const
Definition ArchSpec.h:528
lldb::ByteOrder GetByteOrder() const
Returns the byte order for the architecture specification.
Definition ArchSpec.cpp:730
Generic representation of a type in a programming language.
bool IsIntegerOrEnumerationType(bool &is_signed) const
bool IsRealFloatingPointType() const
Returns true for non-complex float types.
llvm::Expected< uint64_t > GetBitSize(ExecutionContextScope *exe_scope) const
Return the size of the type in bits.
bool IsPointerType(CompilerType *pointee_type=nullptr) const
A uniqued constant string class.
Definition ConstString.h:40
A subclass of DataBuffer that stores a data buffer on the heap.
An data extractor class.
float GetFloat(lldb::offset_t *offset_ptr) const
Extract a float from *offset_ptr.
uint32_t GetMaxU32(lldb::offset_t *offset_ptr, size_t byte_size) const
Extract an integer of size byte_size from *offset_ptr.
lldb::offset_t CopyByteOrderedData(lldb::offset_t src_offset, lldb::offset_t src_len, void *dst, lldb::offset_t dst_len, lldb::ByteOrder dst_byte_order) const
Copy dst_len bytes from *offset_ptr and ensure the copied data is treated as a value that can be swap...
double GetDouble(lldb::offset_t *offset_ptr) const
"lldb/Target/ExecutionContext.h" A class that contains an execution context.
Target * GetTargetPtr() const
Returns a pointer to the target object.
Process * GetProcessPtr() const
Returns a pointer to the process object.
void PutString(llvm::StringRef str)
Definition Log.cpp:147
static bool RegisterPlugin(llvm::StringRef name, llvm::StringRef description, ABICreateInstance create_callback)
static bool UnregisterPlugin(ABICreateInstance create_callback)
uint64_t ReadRegisterAsUnsigned(uint32_t reg, uint64_t fail_value)
const RegisterInfo * GetRegisterInfo(lldb::RegisterKind reg_kind, uint32_t reg_num)
bool WriteRegisterFromUnsigned(uint32_t reg, uint64_t uval)
const RegisterInfo * GetRegisterInfoByName(llvm::StringRef reg_name, uint32_t start_idx=0)
virtual bool ReadRegister(const RegisterInfo *reg_info, RegisterValue &reg_value)=0
bool GetData(DataExtractor &data) const
void SetUInt32(uint32_t uint, Type t=eTypeUInt32)
An error handling class.
Definition Status.h:118
static Status FromErrorStringWithFormat(const char *format,...) __attribute__((format(printf
Definition Status.cpp:106
static Status FromErrorString(const char *str)
Definition Status.h:141
bool Fail() const
Test for error condition.
Definition Status.cpp:293
const char * AsCString(const char *default_error_str="unknown error") const
Get the error string associated with the current error.
Definition Status.cpp:194
llvm::StringRef GetString() const
size_t Printf(const char *format,...) __attribute__((format(printf
Output printf formatted output to the stream.
Definition Stream.cpp:134
size_t PutCString(llvm::StringRef cstr)
Output a C string to the stream.
Definition Stream.cpp:65
const ArchSpec & GetArchitecture() const
Definition Target.h:1183
void SetIsRegisterPlusOffset(uint32_t reg_num, int32_t offset)
Definition UnwindPlan.h:240
const FAValue & GetCFAValue() const
Definition UnwindPlan.h:365
bool SetRegisterLocationToRegister(uint32_t reg_num, uint32_t other_reg_num, bool can_replace)
void SetUnspecifiedRegistersAreUndefined(bool unspec_is_undef)
Definition UnwindPlan.h:408
static lldb::ValueObjectSP Create(ExecutionContextScope *exe_scope, lldb::ByteOrder byte_order, uint32_t addr_byte_size, lldb::addr_t address=LLDB_INVALID_ADDRESS)
static lldb::ValueObjectSP Create(ExecutionContextScope *exe_scope, llvm::StringRef name, const Address &address, lldb::TypeSP &type_sp)
const Scalar & GetScalar() const
See comment on m_scalar to understand what GetScalar returns.
Definition Value.h:113
void SetCompilerType(const CompilerType &compiler_type)
Definition Value.cpp:276
#define LLDB_REGNUM_GENERIC_RA
#define LLDB_REGNUM_GENERIC_SP
#define LLDB_REGNUM_GENERIC_ARG4
#define LLDB_REGNUM_GENERIC_ARG3
#define LLDB_REGNUM_GENERIC_ARG1
#define LLDB_REGNUM_GENERIC_FLAGS
#define UINT32_MAX
#define LLDB_INVALID_REGNUM
#define LLDB_REGNUM_GENERIC_ARG2
#define LLDB_REGNUM_GENERIC_PC
#define LLDB_REGNUM_GENERIC_FP
A class that represents a running process on the host machine.
Log * GetLog(Cat mask)
Retrieve the Log object for the channel associated with the given log enum.
Definition Log.h:332
std::shared_ptr< lldb_private::ABI > ABISP
std::shared_ptr< lldb_private::StackFrame > StackFrameSP
std::shared_ptr< lldb_private::ValueObject > ValueObjectSP
uint64_t offset_t
Definition lldb-types.h:85
std::shared_ptr< lldb_private::Process > ProcessSP
@ eEncodingUint
unsigned integer
ByteOrder
Byte ordering definitions.
std::shared_ptr< lldb_private::UnwindPlan > UnwindPlanSP
std::shared_ptr< lldb_private::WritableDataBuffer > WritableDataBufferSP
uint64_t addr_t
Definition lldb-types.h:80
@ eRegisterKindGeneric
insn ptr reg, stack ptr reg, etc not specific to any particular target
@ eRegisterKindDWARF
the register numbers seen DWARF
Every register is described in detail including its name, alternate name (optional),...
uint32_t byte_size
Size in bytes of the register.
const char * name
Name of this register, can't be NULL.